A low power and high speed Viterbi decoder chip for WLAN applications

Chien Ching Lin; Chia Cho Wu; Chen-Yi Lee

doi:10.1109/ESSCIRC.2003.1257237

A low power and high speed Viterbi decoder chip for WLAN applications

Chien Ching Lin, Chia Cho Wu, Chen-Yi Lee

研究成果: Conference article › 同行評審

12 引文斯高帕斯（Scopus）

摘要

This paper presents a 166Mb/s, 64-state, radix-4, 16-level soft decision Viterbi decoder for high speed WLAN applications. With the path merging and trace forward techniques, the memory read operations are reduced to save power consumption. A test chip is fabricated in 0.35μm IP4M CMOS process, and can achieve the maximum throughput rate of 166Mbit/s under 3.3V. The measured power consumption is below 55mW under 166Mb/s throughput rate at 2.2V.

原文	English
文章編號	1257237
頁（從 - 到）	723-726
頁數	4
期刊	European Solid-State Circuits Conference
DOIs	https://doi.org/10.1109/ESSCIRC.2003.1257237
出版狀態	Published - 2003
事件	29th European Solid-State Circuits Conference, ESSCIRC 2003 - Estoril, 葡萄牙持續時間: 16 9月 2003 → 18 9月 2003

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10.1109/ESSCIRC.2003.1257237

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title = "A low power and high speed Viterbi decoder chip for WLAN applications",

abstract = "This paper presents a 166Mb/s, 64-state, radix-4, 16-level soft decision Viterbi decoder for high speed WLAN applications. With the path merging and trace forward techniques, the memory read operations are reduced to save power consumption. A test chip is fabricated in 0.35μm IP4M CMOS process, and can achieve the maximum throughput rate of 166Mbit/s under 3.3V. The measured power consumption is below 55mW under 166Mb/s throughput rate at 2.2V.",

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journal = "European Solid-State Circuits Conference",

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AU - Wu, Chia Cho

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AB - This paper presents a 166Mb/s, 64-state, radix-4, 16-level soft decision Viterbi decoder for high speed WLAN applications. With the path merging and trace forward techniques, the memory read operations are reduced to save power consumption. A test chip is fabricated in 0.35μm IP4M CMOS process, and can achieve the maximum throughput rate of 166Mbit/s under 3.3V. The measured power consumption is below 55mW under 166Mb/s throughput rate at 2.2V.

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A low power and high speed Viterbi decoder chip for WLAN applications

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