A low-noise wide range delta-sigma frequency synthesizer for DTV broadband

Te Wen Liao*, Jun Ren Su, Chung-Chih Hung

*此作品的通信作者

研究成果: Conference contribution同行評審

摘要

The proposed low noise wide frequency range Phase Loco Loop (PLL) proposed in TSMC 0.18-um CMOS technology is developed for DTV broadband. It incorporates a Extended Multi-band Ring Voltage Control Oscillator (VCO) to enhance the frequency selection range of the conventional Multi-band Ring VCO accomplishing a wide frequency range and better phase noise PLL. This frequency synthesizer is measured the phase noise of - 97.1dBc/Hz at 3MHz offset frequency and reference spurs below - 69.78dBc at 36MHz offset. The VCO gain Kvco (73MHz/V-328MHz/V) is improved by using the Extended Multi-band Ring VCO obtaining a better phase noise performance than the conventional Multi-band Ring VCO structure.

原文English
主出版物標題2010 IEEE International Conference on Electronics, Circuits, and Systems, ICECS 2010 - Proceedings
頁面667-670
頁數4
DOIs
出版狀態Published - 2010
事件2010 IEEE International Conference on Electronics, Circuits, and Systems, ICECS 2010 - Athens, Greece
持續時間: 12 12月 201015 12月 2010

出版系列

名字2010 IEEE International Conference on Electronics, Circuits, and Systems, ICECS 2010 - Proceedings

Conference

Conference2010 IEEE International Conference on Electronics, Circuits, and Systems, ICECS 2010
國家/地區Greece
城市Athens
期間12/12/1015/12/10

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