摘要
A low-jitter digitally controlled oscillator (DCO) with multiphase differential outputs and good linearity is presented. The DCO is composed of four differential delay cells and can achieve linear tuning over a wide frequency range. The proposed fully differential delay cell comprises logic cells in standard library and varactors. The measured rms jitter and pk-pk jitter from 2.5-GHz carrier are 2.827 and 29 ps, respectively. The power consumption is 6 mW from a 1.2 V supply. An experimental prototype is designed using 65-nm CMOS technology, and the chip area is 156 μm × 92 μ2.
原文 | English |
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文章編號 | 6798731 |
頁(從 - 到) | 766-770 |
頁數 | 5 |
期刊 | IEEE Transactions on Very Large Scale Integration (VLSI) Systems |
卷 | 23 |
發行號 | 4 |
DOIs | |
出版狀態 | Published - 1 4月 2015 |