A low-glitch binary-weighted DAC with delay compensation scheme

Keyphrases

• Compensation Scheme 100%
• Digital-to-analog Converter 100%
• Binary Weights 100%
• Spurious-free Dynamic Range 100%
• Delay Compensation 100%
• Low Glitch 100%
• Output Frequency 66%
• Variable Delay 66%
• Delay Buffer 66%
• Glitch Power 66%
• Power Supply 33%
• CMOS Technology 33%
• Proposed Design 33%
• Low-power Design 33%
• Static Performance 33%
• Input Buffer 33%
• Current Switch 33%
• Differential Nonlinearity 33%
• Integral Nonlinearity 33%
• Current-steering Digital-to-analog Converter 33%
• Retiming 33%
• Wireless Communication Systems 33%
• Delay Difference 33%
• Digital Video 33%
• Digital TV 33%
• Update Rate 33%
• Compact Layout 33%
• Switch Timing 33%
• Application in Industry 33%

Engineering

• Digital-to-Analog Converter 100%
• Dynamic Range 75%
• Output Frequency 50%
• Nonlinearity 50%
• Energy Engineering 25%
• Communication System 25%
• Power Supply 25%
• Wireless Communication 25%
• Digital Video 25%
• Design Power 25%
• TV 25%
• Current Switch 25%
• Input Buffer 25%
• Code Transition 25%
• Delay Difference 25%