A Fine-Granularity Image Pyramid Accelerator for Embedded Processors

Image-pyramid generator is an important component for many computer vision applications. Due to the complexity of image scaling operations, embedded application processors usually generate three- or four-level image pyramids for vision applications. In this paper, we present an image pyramid accelerator for embedded processors that generates image pyramids of up to 24-levels of down-sampled resolutions for the input image. Since image pyramids are crucial for the coarse-to-fine analysis of many computer vision problems, more resolution levels in the image pyramid can improve the parameter-estimation accuracy. Furthermore, the down-sampling filters used in the proposed design is based on a long-tap Sine-windowed Sinc function filter. Therefore, it preserves more image details than other low-complexity filters such as the bilinear or the bicubic interpolation filter. The proposed circuit is verified on an FPGA development board with a Xilinx Kintex-7 device and will be made open-source. The experimental results show that the design is very promising for real-time computer vision applications.