A Feedforward Controlled Digital Low-Dropout Regulator With Weight Redistribution Algorithm and Body Voltage Control for Improving Line Regulation With 99.99% Current Efficiency and 0.5-mV Output Voltage Ripple

Bo Hao Chen; Tzu Ying Wu; Kuo Lin Zheng; Ke Horng Chen; Ying Hsi Lin; Shian Ru Lin; Tsung Yen Tsai

doi:10.1109/JSSC.2022.3185158

A Feedforward Controlled Digital Low-Dropout Regulator With Weight Redistribution Algorithm and Body Voltage Control for Improving Line Regulation With 99.99% Current Efficiency and 0.5-mV Output Voltage Ripple

Bo Hao Chen, Tzu Ying Wu, Kuo Lin Zheng, Ke Horng Chen, Ying Hsi Lin, Shian Ru Lin, Tsung Yen Tsai

電機工程學系

研究成果: Article › 同行評審

8 引文斯高帕斯（Scopus）

摘要

In this article, a digital LDO with a feedforward controller and weight redistribution algorithm (WRA) for line regulation improvement is proposed. The proposed digital low dropout (DLDO) uses a feedforward path to obtain the information of <inline-formula> <tex-math notation="LaTeX">$V_{\mathrm{IN}}$</tex-math> </inline-formula> and applies WRA and body voltage controller to adjust <inline-formula> <tex-math notation="LaTeX">$I_{\mathrm{OUT}}$</tex-math> </inline-formula> to minimize the output voltage ripple <inline-formula> <tex-math notation="LaTeX">$\Delta V_{\mathrm{OUT}}$</tex-math> </inline-formula>. Different from conventional freeze mode, the feedforward control (FFC) with low quiescent current can keep <inline-formula> <tex-math notation="LaTeX">$\Delta V_{\mathrm{OUT}} <$</tex-math> </inline-formula> 0.5 mV in steady state and <inline-formula> <tex-math notation="LaTeX">$\Delta V_{\mathrm{OUT}} <$</tex-math> </inline-formula> 4 mV during line transient. In order for the feedback loop to rapidly wake up, the transient pump circuit is used to reduce the undershoot to less than 30 mV in the case of load change from 1 to 200 mA. Due to low quiescent current in the FFC, the DLDO achieves peak current efficiency of 99.99% at heavy loads.

原文	English
頁（從 - 到）	1-11
頁數	11
期刊	IEEE Journal of Solid-State Circuits
DOIs	https://doi.org/10.1109/JSSC.2022.3185158
出版狀態	Accepted/In press - 2022

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10.1109/JSSC.2022.3185158

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Chen, B. H., Wu, T. Y., Zheng, K. L., Chen, K. H., Lin, Y. H., Lin, S. R., & Tsai, T. Y. (認可的出版社/出版中). A Feedforward Controlled Digital Low-Dropout Regulator With Weight Redistribution Algorithm and Body Voltage Control for Improving Line Regulation With 99.99% Current Efficiency and 0.5-mV Output Voltage Ripple. IEEE Journal of Solid-State Circuits, 1-11. https://doi.org/10.1109/JSSC.2022.3185158

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title = "A Feedforward Controlled Digital Low-Dropout Regulator With Weight Redistribution Algorithm and Body Voltage Control for Improving Line Regulation With 99.99% Current Efficiency and 0.5-mV Output Voltage Ripple",

abstract = "In this article, a digital LDO with a feedforward controller and weight redistribution algorithm (WRA) for line regulation improvement is proposed. The proposed digital low dropout (DLDO) uses a feedforward path to obtain the information of $V_{\mathrm{IN}}$ and applies WRA and body voltage controller to adjust $I_{\mathrm{OUT}}$ to minimize the output voltage ripple $\Delta V_{\mathrm{OUT}}$ . Different from conventional freeze mode, the feedforward control (FFC) with low quiescent current can keep $\Delta V_{\mathrm{OUT}} <$ 0.5 mV in steady state and $\Delta V_{\mathrm{OUT}} <$ 4 mV during line transient. In order for the feedback loop to rapidly wake up, the transient pump circuit is used to reduce the undershoot to less than 30 mV in the case of load change from 1 to 200 mA. Due to low quiescent current in the FFC, the DLDO achieves peak current efficiency of 99.99% at heavy loads.",

keywords = "Binary search algorithm, body voltage control (BVC), Clocks, digital low dropout (DLDO), feedforward control (FFC) technique, line regulation, Logic gates, MOSFET, power supply rejection (PSR), Regulators, Switches, Transient analysis, Voltage control",

author = "Chen, {Bo Hao} and Wu, {Tzu Ying} and Zheng, {Kuo Lin} and Chen, {Ke Horng} and Lin, {Ying Hsi} and Lin, {Shian Ru} and Tsai, {Tsung Yen}",

note = "Publisher Copyright: IEEE",

year = "2022",

doi = "10.1109/JSSC.2022.3185158",

language = "English",

pages = "1--11",

journal = "IEEE Journal of Solid-State Circuits",

issn = "0018-9200",

publisher = "Institute of Electrical and Electronics Engineers Inc.",

}

Chen, BH, Wu, TY, Zheng, KL, Chen, KH, Lin, YH, Lin, SR & Tsai, TY 2022, 'A Feedforward Controlled Digital Low-Dropout Regulator With Weight Redistribution Algorithm and Body Voltage Control for Improving Line Regulation With 99.99% Current Efficiency and 0.5-mV Output Voltage Ripple', IEEE Journal of Solid-State Circuits, 頁 1-11. https://doi.org/10.1109/JSSC.2022.3185158

TY - JOUR

T1 - A Feedforward Controlled Digital Low-Dropout Regulator With Weight Redistribution Algorithm and Body Voltage Control for Improving Line Regulation With 99.99% Current Efficiency and 0.5-mV Output Voltage Ripple

AU - Chen, Bo Hao

AU - Wu, Tzu Ying

AU - Zheng, Kuo Lin

AU - Chen, Ke Horng

AU - Lin, Ying Hsi

AU - Lin, Shian Ru

AU - Tsai, Tsung Yen

N1 - Publisher Copyright: IEEE

PY - 2022

Y1 - 2022

N2 - In this article, a digital LDO with a feedforward controller and weight redistribution algorithm (WRA) for line regulation improvement is proposed. The proposed digital low dropout (DLDO) uses a feedforward path to obtain the information of $V_{\mathrm{IN}}$ and applies WRA and body voltage controller to adjust $I_{\mathrm{OUT}}$ to minimize the output voltage ripple $\Delta V_{\mathrm{OUT}}$ . Different from conventional freeze mode, the feedforward control (FFC) with low quiescent current can keep $\Delta V_{\mathrm{OUT}} <$ 0.5 mV in steady state and $\Delta V_{\mathrm{OUT}} <$ 4 mV during line transient. In order for the feedback loop to rapidly wake up, the transient pump circuit is used to reduce the undershoot to less than 30 mV in the case of load change from 1 to 200 mA. Due to low quiescent current in the FFC, the DLDO achieves peak current efficiency of 99.99% at heavy loads.

AB - In this article, a digital LDO with a feedforward controller and weight redistribution algorithm (WRA) for line regulation improvement is proposed. The proposed digital low dropout (DLDO) uses a feedforward path to obtain the information of $V_{\mathrm{IN}}$ and applies WRA and body voltage controller to adjust $I_{\mathrm{OUT}}$ to minimize the output voltage ripple $\Delta V_{\mathrm{OUT}}$ . Different from conventional freeze mode, the feedforward control (FFC) with low quiescent current can keep $\Delta V_{\mathrm{OUT}} <$ 0.5 mV in steady state and $\Delta V_{\mathrm{OUT}} <$ 4 mV during line transient. In order for the feedback loop to rapidly wake up, the transient pump circuit is used to reduce the undershoot to less than 30 mV in the case of load change from 1 to 200 mA. Due to low quiescent current in the FFC, the DLDO achieves peak current efficiency of 99.99% at heavy loads.

KW - Binary search algorithm

KW - body voltage control (BVC)

KW - Clocks

KW - digital low dropout (DLDO)

KW - feedforward control (FFC) technique

KW - line regulation

KW - Logic gates

KW - MOSFET

KW - power supply rejection (PSR)

KW - Regulators

KW - Switches

KW - Transient analysis

KW - Voltage control

UR - http://www.scopus.com/inward/record.url?scp=85134195700&partnerID=8YFLogxK

U2 - 10.1109/JSSC.2022.3185158

DO - 10.1109/JSSC.2022.3185158

M3 - Article

AN - SCOPUS:85134195700

SN - 0018-9200

SP - 1

EP - 11

JO - IEEE Journal of Solid-State Circuits

JF - IEEE Journal of Solid-State Circuits

ER -

A Feedforward Controlled Digital Low-Dropout Regulator With Weight Redistribution Algorithm and Body Voltage Control for Improving Line Regulation With 99.99% Current Efficiency and 0.5-mV Output Voltage Ripple

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