A dual-field elliptic curve cryptographic processor with a radix-4 unified division unit

Yao Lin Chen; Jen Wei Lee; Po Chun Liu; Hsie-Chia Chang; Chen-Yi Lee

doi:10.1109/ISCAS.2011.5937665

A dual-field elliptic curve cryptographic processor with a radix-4 unified division unit

Yao Lin Chen^*, Jen Wei Lee, Po Chun Liu, Hsie-Chia Chang, Chen-Yi Lee

^*此作品的通信作者

研究成果: Conference contribution › 同行評審

17 引文斯高帕斯（Scopus）

摘要

To enhance the data security in network communications, this paper presents a dual-field elliptic curve cryptographic processor (DECP) supporting all finite field operations and elliptic curve (EC) functions. Based on the fast radix-4 unified division algorithm, the execution time can be significantly reduced by a factor of three. By exploiting the hardware sharing and the ladder selection techniques, the proposed 160-bit and 256-bit DECP can have competitive execution cycle with only 0.29mm² and 0.45mm² silicon area in 90nm CMOS technology. In addition, the operating frequency in dual field can be increased by applying the data-path separation method and the degree checker. Our proposed DECP is over 2∼6 times better in area-time product than relative works.

原文	English
主出版物標題	2011 IEEE International Symposium of Circuits and Systems, ISCAS 2011
頁面	713-716
頁數	4
DOIs	https://doi.org/10.1109/ISCAS.2011.5937665
出版狀態	Published - 2 8月 2011
事件	2011 IEEE International Symposium of Circuits and Systems, ISCAS 2011 - Rio de Janeiro, Brazil 持續時間: 15 5月 2011 → 18 5月 2011

出版系列

名字	Proceedings - IEEE International Symposium on Circuits and Systems
ISSN（列印）	0271-4310

Conference

Conference	2011 IEEE International Symposium of Circuits and Systems, ISCAS 2011
國家/地區	Brazil
城市	Rio de Janeiro
期間	15/05/11 → 18/05/11

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10.1109/ISCAS.2011.5937665

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Link to publication in Scopus

引用此

Chen, Y. L., Lee, J. W., Liu, P. C., Chang, H-C., & Lee, C-Y. (2011). A dual-field elliptic curve cryptographic processor with a radix-4 unified division unit. 於 2011 IEEE International Symposium of Circuits and Systems, ISCAS 2011 (頁 713-716). 文章 5937665 (Proceedings - IEEE International Symposium on Circuits and Systems). https://doi.org/10.1109/ISCAS.2011.5937665

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title = "A dual-field elliptic curve cryptographic processor with a radix-4 unified division unit",

abstract = "To enhance the data security in network communications, this paper presents a dual-field elliptic curve cryptographic processor (DECP) supporting all finite field operations and elliptic curve (EC) functions. Based on the fast radix-4 unified division algorithm, the execution time can be significantly reduced by a factor of three. By exploiting the hardware sharing and the ladder selection techniques, the proposed 160-bit and 256-bit DECP can have competitive execution cycle with only 0.29mm2 and 0.45mm2 silicon area in 90nm CMOS technology. In addition, the operating frequency in dual field can be increased by applying the data-path separation method and the degree checker. Our proposed DECP is over 2∼6 times better in area-time product than relative works.",

author = "Chen, {Yao Lin} and Lee, {Jen Wei} and Liu, {Po Chun} and Hsie-Chia Chang and Chen-Yi Lee",

year = "2011",

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doi = "10.1109/ISCAS.2011.5937665",

language = "English",

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series = "Proceedings - IEEE International Symposium on Circuits and Systems",

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Chen, YL, Lee, JW, Liu, PC, Chang, H-C & Lee, C-Y 2011, A dual-field elliptic curve cryptographic processor with a radix-4 unified division unit. 於 2011 IEEE International Symposium of Circuits and Systems, ISCAS 2011., 5937665, Proceedings - IEEE International Symposium on Circuits and Systems, 頁 713-716, 2011 IEEE International Symposium of Circuits and Systems, ISCAS 2011, Rio de Janeiro, Brazil, 15/05/11. https://doi.org/10.1109/ISCAS.2011.5937665

TY - GEN

T1 - A dual-field elliptic curve cryptographic processor with a radix-4 unified division unit

AU - Chen, Yao Lin

AU - Lee, Jen Wei

AU - Liu, Po Chun

AU - Chang, Hsie-Chia

AU - Lee, Chen-Yi

PY - 2011/8/2

Y1 - 2011/8/2

N2 - To enhance the data security in network communications, this paper presents a dual-field elliptic curve cryptographic processor (DECP) supporting all finite field operations and elliptic curve (EC) functions. Based on the fast radix-4 unified division algorithm, the execution time can be significantly reduced by a factor of three. By exploiting the hardware sharing and the ladder selection techniques, the proposed 160-bit and 256-bit DECP can have competitive execution cycle with only 0.29mm2 and 0.45mm2 silicon area in 90nm CMOS technology. In addition, the operating frequency in dual field can be increased by applying the data-path separation method and the degree checker. Our proposed DECP is over 2∼6 times better in area-time product than relative works.

AB - To enhance the data security in network communications, this paper presents a dual-field elliptic curve cryptographic processor (DECP) supporting all finite field operations and elliptic curve (EC) functions. Based on the fast radix-4 unified division algorithm, the execution time can be significantly reduced by a factor of three. By exploiting the hardware sharing and the ladder selection techniques, the proposed 160-bit and 256-bit DECP can have competitive execution cycle with only 0.29mm2 and 0.45mm2 silicon area in 90nm CMOS technology. In addition, the operating frequency in dual field can be increased by applying the data-path separation method and the degree checker. Our proposed DECP is over 2∼6 times better in area-time product than relative works.

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U2 - 10.1109/ISCAS.2011.5937665

DO - 10.1109/ISCAS.2011.5937665

M3 - Conference contribution

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SN - 9781424494736

T3 - Proceedings - IEEE International Symposium on Circuits and Systems

SP - 713

EP - 716

BT - 2011 IEEE International Symposium of Circuits and Systems, ISCAS 2011

T2 - 2011 IEEE International Symposium of Circuits and Systems, ISCAS 2011

Y2 - 15 May 2011 through 18 May 2011

ER -

A dual-field elliptic curve cryptographic processor with a radix-4 unified division unit

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