TY - GEN
T1 - A distributed thread scheduler for dynamic multithreading on throughput processors
AU - Yen, Ta Kan
AU - Kuo, Hsien Kai
AU - Lai, Bo-Cheng
PY - 2013/8/15
Y1 - 2013/8/15
N2 - GPGPUs have emerged as one of the most widely used throughput processors. Deep multithreading and cache hierarchy are the two effective implementations to achieve high throughput computing in modern GPGPUs. However, these are two conflicting design options. Finding a proper design point between the two has become a significant performance factor to GPGPUs. This paper proposes a distributed thread scheduler for dynamic multithreading on GPGPUs. By demonstrating the trade-off issue between the multithreading and cache contention, the proposed scheduler dynamically adjusts the multithreading degree to achieve superior performance. With the proposed scheduler, the cache misses can be decreased by 20.6% and 37.9% on the L1 and L2 cache respectively. The overall performance can be enhanced by an average of 16.4%.
AB - GPGPUs have emerged as one of the most widely used throughput processors. Deep multithreading and cache hierarchy are the two effective implementations to achieve high throughput computing in modern GPGPUs. However, these are two conflicting design options. Finding a proper design point between the two has become a significant performance factor to GPGPUs. This paper proposes a distributed thread scheduler for dynamic multithreading on GPGPUs. By demonstrating the trade-off issue between the multithreading and cache contention, the proposed scheduler dynamically adjusts the multithreading degree to achieve superior performance. With the proposed scheduler, the cache misses can be decreased by 20.6% and 37.9% on the L1 and L2 cache respectively. The overall performance can be enhanced by an average of 16.4%.
UR - http://www.scopus.com/inward/record.url?scp=84881347490&partnerID=8YFLogxK
U2 - 10.1109/VLDI-DAT.2013.6533822
DO - 10.1109/VLDI-DAT.2013.6533822
M3 - Conference contribution
AN - SCOPUS:84881347490
SN - 9781467344357
T3 - 2013 International Symposium on VLSI Design, Automation, and Test, VLSI-DAT 2013
BT - 2013 International Symposium on VLSI Design, Automation, and Test, VLSI-DAT 2013
T2 - 2013 International Symposium on VLSI Design, Automation, and Test, VLSI-DAT 2013
Y2 - 22 April 2013 through 24 April 2013
ER -