A continuous-time delta-sigma modulator with novel data-weighted averaging algorithm for audio application

Jia Ni Lin, Hsing Chien Chu, Zong Yi Chen, Chung-Chih Hung

研究成果: Conference contribution同行評審

2 引文 斯高帕斯(Scopus)

摘要

A 4-bit continuous-time delta-sigma modulator (CT-DSM) with the proposed data-weighted averaging (DWA) algorithm for audio application is presented. The proposed method randomly adds one to pointer address in the DWA to reduce distortion tones and improve the performance of spurious-free dynamic range (SFDR) and signal to noise and distortion ratio (SNDR), as compared with the conventional DWA. The post-layout simulation results show that the modulator designed in TSMC 0.18 μm CMOS process achieves the SNDR of 81.5 dB and the dynamic range (DR) of 85dB in 24 kHz signal bandwidth. The chip area is 1.168 × 0.632 mm2 and the power consumption is 339 μW from a 1.8 V power supply.

原文English
主出版物標題Proceedings of the 2015 IEEE International Conference on Electron Devices and Solid-State Circuits, EDSSC 2015
發行者Institute of Electrical and Electronics Engineers Inc.
頁面281-284
頁數4
ISBN(電子)9781479983636
DOIs
出版狀態Published - 30 9月 2015
事件11th IEEE International Conference on Electron Devices and Solid-State Circuits, EDSSC 2015 - Singapore, Singapore
持續時間: 1 6月 20154 6月 2015

出版系列

名字Proceedings of the 2015 IEEE International Conference on Electron Devices and Solid-State Circuits, EDSSC 2015

Conference

Conference11th IEEE International Conference on Electron Devices and Solid-State Circuits, EDSSC 2015
國家/地區Singapore
城市Singapore
期間1/06/154/06/15

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