@inproceedings{cdbbf9ed78b440779527eb2e16e6281e,
title = "A continuous-time ΔΣ modulator with a digital technique for excess loop delay compensation",
abstract = "A 3rd-order continuous-time ΔΣ modulator with a highly-digital technique for excess loop delay (ELD) compensation is reported. A digitally controlled reference switching matrix is used to replace the commonly used power-hungry signal adder and extra DAC driving the quantizer. The feedback DAC is embedded in the quantizer, and implemented by a few switches. The proposed technique helps the modulator tolerate excess loop delay up to half a clock period. The modulator achieves an SQNR of 83.3 dB in a 15 MHz signal bandwidth. The use of a 2-bit FIR feedback DAC lowers the jitter-induced noise by about 10 dB. The simulated power consumption of the modulator is 7 mW.",
keywords = "excess loop delay, FIR feedback DAC, reference switching",
author = "Yi Zhang and Chia-Hung Chen and Tao He and Xin Meng and Temes, {Gabor C.}",
year = "2014",
month = jan,
day = "1",
doi = "10.1109/ISCAS.2014.6865290",
language = "English",
isbn = "9781479934324",
series = "Proceedings - IEEE International Symposium on Circuits and Systems",
publisher = "Institute of Electrical and Electronics Engineers Inc.",
pages = "934--937",
booktitle = "2014 IEEE International Symposium on Circuits and Systems, ISCAS 2014",
address = "United States",
note = "2014 IEEE International Symposium on Circuits and Systems, ISCAS 2014 ; Conference date: 01-06-2014 Through 05-06-2014",
}