A cache aware multithreading decision scheme on GPGPUs

Ta Kang Yen, Bo Yao Yu, Bo-Cheng Lai

    研究成果: Conference contribution同行評審

    摘要

    GPGPUs have emerged as one of the most widely used throughput processors. Deep multithreading and on-chip cache hierarchy are the two effective designs to achieve high throughput computing in modern GPGPUs. However, excessive multithreading could aggravate the cache contention while conservative multithreading could leave the execution resource under-utilized. Finding a proper design point between the two has become a significant performance factor to GPGPUs. This paper investigates the correlation between caching behavior and multithreading technique. By demonstrating the trade-off issue between the multithreading and cache contention, this paper proposes a multithreading decision scheme to dynamically adjusts the multithreading degree to achieve superior performance. With the proposed decision scheme, the system performance of memory-intensive workloads can be improved by 60% in average.

    原文English
    主出版物標題Proceedings - 2014 IEEE 8th International Symposium on Embedded Multicore/Manycore SoCs, MCSoC 2014
    發行者Institute of Electrical and Electronics Engineers Inc.
    頁面267-272
    頁數6
    ISBN(電子)9781479943050
    DOIs
    出版狀態Published - 6 11月 2014
    事件2014 8th IEEE International Symposium on Embedded Multicore/Manycore SoCs, MCSoC 2014 - Aizu-Wakamatsu, Japan
    持續時間: 23 9月 201425 9月 2014

    出版系列

    名字Proceedings - 2014 IEEE 8th International Symposium on Embedded Multicore/Manycore SoCs, MCSoC 2014

    Conference

    Conference2014 8th IEEE International Symposium on Embedded Multicore/Manycore SoCs, MCSoC 2014
    國家/地區Japan
    城市Aizu-Wakamatsu
    期間23/09/1425/09/14

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