A 94.3% Peak Efficiency Adaptive Switchable CCM and DCM Single-Inductor Multiple-Output Converter With 0.03 mV/mA Low Crosstalk and 185 nA Ultralow Quiescent

Tzu Hsien Yang, Yong Hwa Wen, Yu Jheng Ouyang, Chun Kai Chiu, Bo Kuan Wu, Ke Horng Chen, Ying Hsi Lin, Shian Ru Lin, Tsung Yen Tsai

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摘要

This article proposes a single-inductor multi-output converter implemented in 0.153 μm CMOS process, including the adaptive switchable continuous conduction mode (CCM) and discontinuous conduction mode (DCM) (ASCD) technique, and a five-input crosstalk reduction error amplifier (CREA) to minimize the cross regulation to 0.03 mV/mA and achieve load capability up to 3 W. At ultra-light loads, the proposed ultralow power (ULP) mode is applied to reach 185 nA quiescent current and enhance light load power efficiency. Moreover, the peak efficiency is as high as 94.3% with a chip area of 1.2 x 1.7 mm².

原文English
期刊IEEE Journal of Solid-State Circuits
DOIs
出版狀態Accepted/In press - 2022

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