A 90nm CMOS MS/RF based Foundry SOC Technology Comprising Superb 185 GHz fT RFMOS and Versatile, high-Q Passive Components for Cost/Performance Optimization

C. H. Chen*, C. S. Chang, C. P. Chao, J. F. Kuan, C. L. Chang, S. H. Wang, H. M. Hsu, W. Y. Lien, Y. C. Tsai, H. C. Lin, C. C. Wu, C. F. Huang, S. M. Chen, P. M. Tseng, C. W. Chen, C. C. Ku, T. Y. Lin, C. F. Chang, H. J. Lin, M. R. TsaiS. Chen, C. F. Chen, M. Y. Wei, Y. J. Wang, J. C.H. Lin, W. M. Chen, C. C. Chang, M. C. King, C. M. Huang, C. T. Lin, J. C. Guo, G. J. Chern, D. D. Tang, J. Y.C. Sun

*此作品的通信作者

研究成果: Conference article同行評審

31 引文 斯高帕斯(Scopus)

摘要

A versatile mixed-signal and RF (MS/RF) technology based on a foundry 90nm CMOS process was demonstrated with excellent MOS transistor fT at 160-185 GHz. Passive elements of various process schemes were fabricated for cost/performance evaluation. To realize low-cost system-on-chip (SOC), passive elements like 0.9um Cu inductors and metal-stacked capacitors (MOM) were implemented using standard logic back-end process. For high performance MS/RF solutions, inductors with 3 μm Cu and ultra thick 6 μm Cu top metal were fabricated to achieve high quality factors, Q> 15 at 1GHz and peak Q>20. Precision metal-sandwiched capacitors (MIM) with unit capacitances of 1.0, 1.5 and 2.0 fF/μm2 were characterized and compared. Comparable or better matching was observed for MIM with higher unit capacitance, implying the possibility for chip size reduction. Specifically, the advantage of better MIM matching was demonstrated for the first time on the data resolution improvement of an A-to-D converter.

原文English
頁(從 - 到)39-42
頁數4
期刊Technical Digest - International Electron Devices Meeting
DOIs
出版狀態Published - 1 12月 2003
事件IEEE International Electron Devices Meeting - Washington, DC, United States
持續時間: 8 12月 200310 12月 2003

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