A 10-Gb/s 90-dBQ optical receiver analog front-end (AFE), including a transimpedance amplifier (TIA), an automatic gain control circuit, and a postamplifier (PA), is fabricated using a 0.18-μm CMOS technology. In contrast with a conventional limiting amplifier architecture, the PA is consisted of a voltage amplifier followed by a slicer. By means of the TIA and the PA codesign, the receiver front-end provides a -3-dB bandwidth of 7.86 GHz and a gain bandwidth product (GBW) of 248.5 THz-Ω. The tiny photocurrent received by the AFE is amplified to a differential voltage swing of 900 mV pp when driving 50-Ω output loads. The measured input sensitivity of the optical receiver is -13 dBm at a bit-error rate of 10 -12 with a 231-1 pseudorandom test pattern. The optical receiver AFE dissipates a total power of 199 mW from a 1.8-V supply, among which 35 mW is consumed by the output buffer. The chip size is 1300 μm × 1796 μm.
|頁（從 - 到）||358-365|
|期刊||IEEE Transactions on Very Large Scale Integration (VLSI) Systems|
|出版狀態||Published - 1 3月 2007|