A 75.6M Base-pairs/s FPGA Accelerator for FM-index Based Paired-end Short-Read Mapping

Chung Hsuan Yang, Yi Chung Wu, Yen Lung Chen, Chao Hsi Lee, Jui Hung Hung, Chia Hsiang Yang

研究成果: Conference contribution同行評審

摘要

Next-generation sequencing (NGS) has been widely applied to genetics research and biomedical applications. It achieves a high sequencing speed by sequencing subsequences (called short-reads) in a massively parallel manner [1]. However, the succeeding data analysis for assembling short-reads still takes a couple of days on CPU and thus becomes the bottleneck. Fig. 1(a) shows the NGS data analysis workflow, consisting of short-read mapping, haplotype & variant calling, and genotype calling. Of these three steps, the execution time is dominated by short-read mapping. A CPU-FPGA heterogeneous system is presented in [2] for accelerating short-read mapping, but the performance improvement is limited. A dedicated FPGA accelerator [3] achieves a higher throughput at a cost of a larger DRAM requirement. Compared to prior arts, this work presents an FPGA accelerator that delivers a 1.7-to-18.6x higher throughput in a memory-efficient way. Paired-end short-read mapping is exploited to achieve the highest 99.3% accuracy on true human DNA.

原文English
主出版物標題2022 IEEE Asian Solid-State Circuits Conference, A-SSCC 2022 - Proceedings
發行者Institute of Electrical and Electronics Engineers Inc.
ISBN(電子)9781665471435
DOIs
出版狀態Published - 2022
事件2022 IEEE Asian Solid-State Circuits Conference, A-SSCC 2022 - Taipei, Taiwan
持續時間: 6 11月 20229 11月 2022

出版系列

名字2022 IEEE Asian Solid-State Circuits Conference, A-SSCC 2022 - Proceedings

Conference

Conference2022 IEEE Asian Solid-State Circuits Conference, A-SSCC 2022
國家/地區Taiwan
城市Taipei
期間6/11/229/11/22

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