A 5.4-mW 4-Gb/s 5-band QPSK transceiver for frequency-division multiplexing memory interface

Wei Han Cho, Yilei Li, Yanghyo Kim, Po-Tsang Huang, Yuan Du, Sheau Jiung Lee, Mau-Chung Chang

研究成果: Conference contribution同行評審

11 引文 斯高帕斯(Scopus)

摘要

This paper presents a novel self-equalized and skewless frequency-division multiplexing memory interface. To prove its feasibility, we have realized a 5-band QPSK transceiver in 40 nm CMOS to transmit up to 4 Gb/s through 10 orthogonal communication channels (each with 400 Mb/s) via on-chip TSV emulator with effective loading of 1 pF or 5-cm FR-4 PCB trace. With differential current-mode signaling, the transceiver consumes only 5.4 mW and takes only 80×100 μm2. A real-time flexible BER testing platform is established to prove that the BER of the transceiver is less than 10-12.

原文English
主出版物標題2015 IEEE Custom Integrated Circuits Conference, CICC 2015
發行者Institute of Electrical and Electronics Engineers Inc.
ISBN(電子)9781479986828
DOIs
出版狀態Published - 25 十一月 2015
事件IEEE Custom Integrated Circuits Conference, CICC 2015 - San Jose, United States
持續時間: 28 九月 201530 九月 2015

出版系列

名字Proceedings of the Custom Integrated Circuits Conference
2015-November
ISSN(列印)0886-5930

Conference

ConferenceIEEE Custom Integrated Circuits Conference, CICC 2015
國家/地區United States
城市San Jose
期間28/09/1530/09/15

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