A 40 nm 0.32 v 3.5 MHz 11T single-ended bit-interleaving subthreshold SRAM with data-aware write-assist

Yi Wei Chiu, Yu Hao Hu, Ming Hsien Tu, Jun Kai Zhao, Shyh-Jye Jou, Ching Te Chuang

研究成果: Conference contribution › 同行評審

22 引文 斯高帕斯（Scopus）

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Keyphrases

Computer Science

Engineering