A 3μW, 0.65V regulator with an embedded temperature compensated voltage reference

Fu To Lin, Jui Hsiang Tsai, Yu-Te Liao

研究成果: Conference contribution同行評審

5 引文 斯高帕斯(Scopus)

摘要

This paper presents a 0.65-V flipped voltage follower (FVF)-based regulator with an embedded sub-1-V voltage reference. A low-pass filter is employed in the current coupling path to reduce the bias noise and improve the power supply rejection (PSR) at a low-frequency band (<kHz). The chip is fabricated in a 0.18-μm CMOS process and occupies an active area of 0.076 mm2. The proposed FVF regulator achieves a temperature coefficient of 68-ppm/°C over 0-100 °C, with a PSR of -50 dB at 1 kHz, and can drive a 0-3 mA load current while consuming only a quiescent current of 4.5 μA at a 0.8 V supply.

原文English
主出版物標題2016 13th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design, SMACD 2016
發行者Institute of Electrical and Electronics Engineers Inc.
ISBN(電子)9781509004904
DOIs
出版狀態Published - 25 7月 2016
事件13th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design, SMACD 2016 - Lisbon, 葡萄牙
持續時間: 27 6月 201630 6月 2016

出版系列

名字2016 13th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design, SMACD 2016

Conference

Conference13th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design, SMACD 2016
國家/地區葡萄牙
城市Lisbon
期間27/06/1630/06/16

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