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A 25-Gb/s, 2.1-pJ/bit, Fully Integrated Optical Receiver With a Baud-Rate Clock and Data Recovery
Yuan Sheng Lee, Wei Hsiang Ho,
Wei-Zen Chen
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電子研究所
研究成果
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18
引文 斯高帕斯(Scopus)
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Keyphrases
Fully Integrated
100%
Clock Recovery
100%
Baud Rate
100%
Integrated Optical Receiver
100%
Demultiplexer
50%
Optical Receiver
50%
Energy Efficiency
25%
Power Consumption
25%
Area Consumption
25%
Front-end Amplifier
25%
Photodetector
25%
High Sensitivity
25%
Jitter
25%
Chip Area
25%
Responsivity
25%
Loop Bandwidth
25%
Receiver Front End
25%
Single chip
25%
Bit Error Rate
25%
Test Pattern
25%
All-digital
25%
Pseudorandom Sequences
25%
Input Sensitivity
25%
Loop Filter
25%
40nm CMOS
25%
Jitter Tolerance
25%
Speed of Adjustment
25%
Digital Loop Filter
25%
Integrated Receiver
25%
Energy-efficient Operation
25%
Digital Post-processing
25%
Hybrid Loop
25%
Engineering
Optical Receiver
100%
Baud Rate
100%
Front End
66%
Demultiplexer
66%
Loop Filter
66%
Energy Efficiency
33%
Energy Conservation
33%
Amplifier
33%
Photodetector
33%
Electric Power Utilization
33%
Chip Area
33%
Loop Bandwidth
33%
Responsivity
33%
Single Chip
33%
Bit Error Rate
33%
Input Sensitivity
33%
Jitter Tolerance
33%