A 2.5 Gbps CMOS optical receiver analog front-end

Wei-Zen Chen, Chao Hsin Lu

研究成果: Article同行評審

38 引文 斯高帕斯(Scopus)


A 3 V, single chip optical receiver analog front-end capable of operating at 2.5 Gbit/sec is fabricated in a 0.35 μ m CMOS technology. The IC contains a TIA with 54.5 dBΩ conversion gain, f -3dB of 2.5 GHz, and a limiting amplifier with a conversion gain of 42 dB, f -3db of 2.3 GHz. The TIA is DC coupled to the limiting amplifier. The measured eye diagram meet OC-48 transition mask. Input referred noise current is about 800 nA.

頁(從 - 到)359-362
期刊Proceedings of the Custom Integrated Circuits Conference
出版狀態Published - 1 1月 2002


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