@inproceedings{e16e23f6ff3448969a810017d77e8d0a,
title = "A 2.5 Gbps CMOS fully integrated optical receiver with lateral pin detector",
abstract = "This paper presents the design of a monolithically integrated CMOS optical receiver, including a photo detector, a transimpedance amplifier, and a post limiting amplifier on a single chip. A novel PIN detector is proposed and adopted in this design without technology modification. The optical receiver is capable of delivering 420 mVpp to 50 Ω output load and operating up to 2.5 Gbps without an equalizer. Implemented in a generic 0.18 μm CMOS technology, the total power dissipation is 138 mW. The chip size is 0.53 mm2.",
keywords = "Limiting amplifier, Optical receiver, Photo detector, Transimpedance amplifier",
author = "Wei-Zen Chen and Huang, {Shih Hao}",
year = "2008",
month = apr,
day = "1",
doi = "10.1109/CICC.2007.4405736",
language = "English",
volume = "15",
series = "Proceedings of the IEEE 2007 Custom Integrated Circuits Conference, CICC 2007",
publisher = "Institute of Electrical and Electronics Engineers Inc.",
pages = "293--296",
booktitle = "Proceedings of the IEEE 2007 Custom Integrated Circuits Conference, CICC 2007",
address = "美國",
edition = "2",
note = "29th Annual IEEE Custom Integrated Circuits Conference, CICC 2007 ; Conference date: 16-09-2007 Through 19-09-2007",
}