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A 2.25 TOPS/W fully-integrated deep CNN learning processor with on-chip training
Cheng Hsun Lu,
Yi Chung Wu
, Chia Hsiang Yang
電子研究所
研究成果
:
Conference contribution
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同行評審
19
引文 斯高帕斯(Scopus)
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Keyphrases
Energy Efficiency
100%
Fully Integrated
100%
Processing Element
100%
Deep Convolutional Neural Network (deep CNN)
100%
Neural Network Learning
100%
On-chip Training
100%
Proposed Design
50%
Processing Latency
50%
High Energy Efficiency
50%
Convolutional Neural Network
50%
Memory Consumption
50%
40nm CMOS
50%
Softmax
50%
Security Privacy
50%
High Security
50%
Floating-point Arithmetic
50%
Limited Area
50%
Clock Gating
50%
Data Gating
50%
Low-precision
50%
Max Pooling
50%
Rectified Linear Unit (ReLU)
50%
Art Learning
50%
Unified Processing
50%
Design Abstraction
50%
Deep Learning Processor
50%
Computer Science
Energy Efficiency
100%
Convolutional Neural Network
100%
Processing Element
66%
Fixed Points
33%
Floating Point
33%
Security and Privacy
33%
Design Abstraction
33%
Softmax Function
33%
Deep Learning Method
33%