A (204, 188) reed-solomon decoder using decomposed Euclidean algorithm

Hsie-Chia Chang; Chih Yu Cheng; Shu Hui Tsai; Chen-Yi Lee

doi:10.1109/MWSCAS.2000.951634

A (204, 188) reed-solomon decoder using decomposed Euclidean algorithm

Hsie-Chia Chang^*, Chih Yu Cheng, Shu Hui Tsai, Chen-Yi Lee

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電子研究所

研究成果: Paper › 同行評審

2 引文斯高帕斯（Scopus）

摘要

A (204, 188) Reed-Solomon decoder for DVB application is presented. The RS decoder features an area-efficient Key Equation Solver using a novel decomposed Euclidean algorithm. We implement the RS decoder using 0.35μm CMOS 1P4M standard cells, where the total gate count is about 16K ∼ 17K. Test results show that the RS decoder chip can run up to 87MHz.

原文	English
頁面	262-265
頁數	4
DOIs	https://doi.org/10.1109/MWSCAS.2000.951634
出版狀態	Published - 1 12月 2000
事件	43rd Midwest Circuits and Systems Conference (MWSCAS-2000) - Lansing, MI, United States 持續時間: 8 8月 2000 → 11 8月 2000

Conference

Conference	43rd Midwest Circuits and Systems Conference (MWSCAS-2000)
國家/地區	United States
城市	Lansing, MI
期間	8/08/00 → 11/08/00

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10.1109/MWSCAS.2000.951634

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Link to publication in Scopus

引用此

@conference{2d19f3e50c2f4cf880b03d08240e6830,

title = "A (204, 188) reed-solomon decoder using decomposed Euclidean algorithm",

abstract = "A (204, 188) Reed-Solomon decoder for DVB application is presented. The RS decoder features an area-efficient Key Equation Solver using a novel decomposed Euclidean algorithm. We implement the RS decoder using 0.35μm CMOS 1P4M standard cells, where the total gate count is about 16K ∼ 17K. Test results show that the RS decoder chip can run up to 87MHz.",

author = "Hsie-Chia Chang and Cheng, {Chih Yu} and Tsai, {Shu Hui} and Chen-Yi Lee",

year = "2000",

month = dec,

day = "1",

doi = "10.1109/MWSCAS.2000.951634",

language = "English",

pages = "262--265",

note = "43rd Midwest Circuits and Systems Conference (MWSCAS-2000) ; Conference date: 08-08-2000 Through 11-08-2000",

}

TY - CONF

T1 - A (204, 188) reed-solomon decoder using decomposed Euclidean algorithm

AU - Chang, Hsie-Chia

AU - Cheng, Chih Yu

AU - Tsai, Shu Hui

AU - Lee, Chen-Yi

PY - 2000/12/1

Y1 - 2000/12/1

N2 - A (204, 188) Reed-Solomon decoder for DVB application is presented. The RS decoder features an area-efficient Key Equation Solver using a novel decomposed Euclidean algorithm. We implement the RS decoder using 0.35μm CMOS 1P4M standard cells, where the total gate count is about 16K ∼ 17K. Test results show that the RS decoder chip can run up to 87MHz.

AB - A (204, 188) Reed-Solomon decoder for DVB application is presented. The RS decoder features an area-efficient Key Equation Solver using a novel decomposed Euclidean algorithm. We implement the RS decoder using 0.35μm CMOS 1P4M standard cells, where the total gate count is about 16K ∼ 17K. Test results show that the RS decoder chip can run up to 87MHz.

UR - http://www.scopus.com/inward/record.url?scp=0034464227&partnerID=8YFLogxK

U2 - 10.1109/MWSCAS.2000.951634

DO - 10.1109/MWSCAS.2000.951634

M3 - Paper

AN - SCOPUS:0034464227

SP - 262

EP - 265

T2 - 43rd Midwest Circuits and Systems Conference (MWSCAS-2000)

Y2 - 8 August 2000 through 11 August 2000

ER -

A (204, 188) reed-solomon decoder using decomposed Euclidean algorithm

摘要

Conference

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