This letter presents a reference-less half-rate receiver with an unlimited range frequency detector (URFD) for 13.8× continuous rate operation. To tolerate channel loss induced intersymbol interference (ISI), the receiver is integrated with a continuous-time linear equalizer (CTLE) and a 2-tap decision feedback equalizer (DFE) on the same chip. Incorporating with the novel pulse width-based URFD, the date rate of the receiver is limited by the frequency tuning range of the voltage-controlled oscillator (VCO). The energy efficiencies of the whole receiver and clock and data recovery (CDR) are about 2.39 and 0.97 pJ/bit, respectively. Implemented in a TSMC 28-nm CMOS process, the active area is 0.056 mm2.
|頁（從 - 到）||186-189|
|期刊||IEEE Solid-State Circuits Letters|
|出版狀態||Published - 2022|