A 16 Channel Real-Time EEG Processing Based on ORICA Algorithm using 28nm CMOS Technology

Kai Yen Wang, Yun Lung Ho, Yu De Huang, Wai-Chi Fang

研究成果: Conference contribution同行評審

摘要

In this paper, we propose a system-on-chip(SOC) design of highly effective multi-channel real-time EEG signal processing system based on Online-Recursive Independent Component Analysis (ORICA) algorithm implemented using TSMC's 28nm CMOS technology. In this chip, concepts of system-on-chip (SOC) design and effective system integration technique are well-combined together to realize a highly miniaturized real-time EEG processing system. The core area and total power consumption of the chip are respectively 1246∗1246μm2 and 25.03mW. The chip operations were validated by ADVANTEST V93000 PS1600 and the results obtained match with the software simulation. The average correlation coefficient between original source signals and extracted ORICA signals reaches 0.9572. Eye blink artifact, and facial muscle artifact will be removed automatically. Producing a pure EEG signal is beneficial for real-time data analysis; therefore, this chip design can enhance the reliability and feasibility of EEG-related applications, such as BCI, medical diagnosis and depth of anesthesia detection.

原文English
主出版物標題Proceedings of the IEEE Workshop on Signal Processing Systems, SiPS 2018
發行者Institute of Electrical and Electronics Engineers Inc.
頁面269-274
頁數6
ISBN(電子)9781538663189
DOIs
出版狀態Published - 31 12月 2018
事件2018 IEEE Workshop on Signal Processing Systems, SiPS 2018 - Cape Town, South Africa
持續時間: 21 10月 201824 10月 2018

出版系列

名字IEEE Workshop on Signal Processing Systems, SiPS: Design and Implementation
2018-October
ISSN(列印)1520-6130

Conference

Conference2018 IEEE Workshop on Signal Processing Systems, SiPS 2018
國家/地區South Africa
城市Cape Town
期間21/10/1824/10/18

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