@inproceedings{4a613c1dd62f4882a9c9982e4f00d71e,
title = "A 12.6MW 573-2,901KS/S Reconfigurable Processor for Reconstruction of Compressively-Sensed Phvsiological Signals",
abstract = "This work presents a reconfigurable processor based on the alternating direction method of multipliers (ADMM) algorithm for reconstructing compressively-sensed signals. The chip delivers a throughput of 573-to-2,901KS/s for reconstructing physiological signals. It dissipates 12.6mW at 87 MHz at 0.6V. Compared to the state-of-the-art designs, the chip achieves a 5.7-to-14x higher throughput with 5-to-11x lower energy for the target reconstruction SNR (RSNR) ≥ 15dB.",
author = "Wang, {Yu Zhe} and Wang, {Yao Pin} and Wu, {Yi Chung} and Yang, {Chia Hsiang}",
note = "Publisher Copyright: {\textcopyright} 2018 IEEE.; 32nd IEEE Symposium on VLSI Circuits, VLSI Circuits 2018 ; Conference date: 18-06-2018 Through 22-06-2018",
year = "2018",
month = oct,
day = "22",
doi = "10.1109/VLSIC.2018.8502321",
language = "English",
series = "IEEE Symposium on VLSI Circuits, Digest of Technical Papers",
publisher = "Institute of Electrical and Electronics Engineers Inc.",
pages = "261--262",
booktitle = "2018 IEEE Symposium on VLSI Circuits, VLSI Circuits 2018",
address = "United States",
}