@inproceedings{5013321d84284260939a490de08c4958,
title = "A 11μW 250 Hz BW two-step incremental ADC with 100 dB DR and 91 dB SNDR for integrated sensor interfaces",
abstract = "A two-step incremental ADC (IADC) is proposed for low-bandwidth, micro-power sensor interface circuits. This architecture extends the order of a conventional IADC from N to (2N-1) by using a two-step operation, while requiring only the circuitry of an Nth-order IADC. The implemented third-order IADC achieves a measured dynamic range of 99.8 dB and an SNDR of 91 dB for a maximum input 2.2 VPP and 250 Hz bandwidth. Fabricated in 65 nm CMOS, the IADC's core area is 0.2 mm2, and consumes only 10.7 μW. The FoMs are 0.76 pJ/conversion-step and 173.5 dB, both among the best reported results.",
keywords = "Analog-to-digital Converter (ADC), chopper stabilization, decimation filter, delta sigma (ΔΣ), extended-counting, incremental data converter, micro-power, oversampling, sensor interface",
author = "Chia-Hung Chen and Yi Zhang and Tao He and Chiang, {Patrick Y.} and Temes, {Gabor C.}",
year = "2014",
month = nov,
day = "4",
doi = "10.1109/CICC.2014.6945988",
language = "English",
series = "Proceedings of the IEEE 2014 Custom Integrated Circuits Conference, CICC 2014",
publisher = "Institute of Electrical and Electronics Engineers Inc.",
booktitle = "Proceedings of the IEEE 2014 Custom Integrated Circuits Conference, CICC 2014",
address = "United States",
note = "36th Annual Custom Integrated Circuits Conference - The Showcase for Integrated Circuit Design in the Heart of Silicon Valley, CICC 2014 ; Conference date: 15-09-2014 Through 17-09-2014",
}