摘要
A 1-V-input 0.45-V-output switched-capacitor (SC) voltage converter with voltage-reference-free pulse-density modulation (VRF-PDM) is proposed. The all-digital VRF-PDM scheme improves the efficiency from 17% to 73% at 50- μA output current by reducing the pulse density and eliminating the voltage reference circuit. An output voltage trimming by the hot-carrier injection to a comparator and a periodic activation scheme of the SC voltage converter are also proposed to solve the problems attributed to VRF-PDM. The proposed voltage converter is fabricated in 65-nm CMOS and achieves an efficiency value of 73%-86% at 50 μ;A-10 mA output current range.
原文 | English |
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文章編號 | 6205614 |
頁(從 - 到) | 361-365 |
頁數 | 5 |
期刊 | IEEE Transactions on Circuits and Systems I: Regular Papers |
卷 | 59 |
發行號 | 6 |
DOIs | |
出版狀態 | Published - 1 6月 2012 |