@inproceedings{07bcaea34b70430b885d260ccb333996,
title = "A 1-V input, 0.2-V to 0.47-V output switched-capacitor DC-DC converter with Pulse Density and Width Modulation (PDWM) for 57% ripple reduction",
abstract = "To effectively reduce output ripple of switched-capacitor DC-DC converters which generate variable output voltages, a novel feedback control scheme is presented. The proposed scheme uses pulse density and width modulation (PDWM) to reduce the output ripple with low output voltage. The prototype chip was implemented using 65nm CMOS process. The switched-capacitor DC-DC converter has 0.2-V to 0.47-V output voltage and delivers 0.25-mA to 10-mA output current from a 1-V input supply with a peak efficiency of 87%. Compared with the conventional pulse density modulation (PDM), the proposed switched-capacitor DC-DC converter with PDWM reduces the output ripple by 57% in the low output voltage region with the efficiency penalty of 2%.",
author = "Xin Zhang and Yu Pu and Koichi Ishida and Yoshikatsu Ryu and Yasuyuki Okuma and Po-Hung Chen and Kazunori Watanabe and Takayasu Sakurai and Makoto Takamiya",
year = "2010",
month = dec,
day = "1",
doi = "10.1109/ASSCC.2010.5716557",
language = "English",
isbn = "9781424482979",
series = "2010 IEEE Asian Solid-State Circuits Conference, A-SSCC 2010",
pages = "61--64",
booktitle = "2010 IEEE Asian Solid-State Circuits Conference, A-SSCC 2010",
note = "null ; Conference date: 08-11-2010 Through 10-11-2010",
}