A 0.8V, 43.5μW ECG signal acquisition IC with a referenceless time-to-digital converter

Shu Hsuan Lin, Fu To Lin, Nai Chen Cheng, Yu-Te Liao

研究成果: Conference contribution同行評審

3 引文 斯高帕斯(Scopus)

摘要

This paper presents a 0.8V analog front-end (AFE) with referenceless time-based digitalization architecture for electrocardiogram (ECG) signal acquisition. Compared to the conventional voltage-domain architecture, the proposed AFE achieves a smaller chip area, lower power consumption, and self-calibration without the high-accuracy clock as well as voltage reference. The chip is fabricated using 0.18μm CMOS technology and occupies a chip area of 0.84 mm2. The design attains a variable gain from 35 dB to 47 dB within a bandwidth of 7 kHz and 10-bit time-to-digital conversion while consuming 43.5 μW at a supply voltage of 0.8V.

原文English
主出版物標題ISCAS 2016 - IEEE International Symposium on Circuits and Systems
發行者Institute of Electrical and Electronics Engineers Inc.
頁面1066-1069
頁數4
ISBN(電子)9781479953400
DOIs
出版狀態Published - 29 7月 2016
事件2016 IEEE International Symposium on Circuits and Systems, ISCAS 2016 - Montreal, 加拿大
持續時間: 22 5月 201625 5月 2016

出版系列

名字Proceedings - IEEE International Symposium on Circuits and Systems
2016-July
ISSN(列印)0271-4310

Conference

Conference2016 IEEE International Symposium on Circuits and Systems, ISCAS 2016
國家/地區加拿大
城市Montreal
期間22/05/1625/05/16

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