A 0.6-V input 94% peak efficiency CCM/DCM digital buck converter in 40-nm CMOS with dual-mode-body-biased zero-crossing detector

Xin Zhang; Yasuyuki Okuma; Po-Hung Chen; Koichi Ishida; Yoshikatsu Ryu; Kazumori Watanabe; Takayasu Sakurai; Makoto Takamiya

doi:10.1109/ASSCC.2013.6690978

A 0.6-V input 94% peak efficiency CCM/DCM digital buck converter in 40-nm CMOS with dual-mode-body-biased zero-crossing detector

Xin Zhang, Yasuyuki Okuma, Po-Hung Chen, Koichi Ishida, Yoshikatsu Ryu, Kazumori Watanabe, Takayasu Sakurai, Makoto Takamiya

電子研究所

研究成果: Conference contribution › 同行評審

2 引文斯高帕斯（Scopus）

摘要

A 0.6-V input, 0.3-0.55V output buck converter is developed in 40-nm CMOS, for low-voltage low-power wireless sensor network systems. The buck converter is able to automatically select DCM or CCM operation, therefore improving the power efficiency and enlarging the output current range, by virtue of the proposed low-power CCM/DCM controller. A dual-mode-body-biased (DMBB) (forward body bias & zero body bias) low-voltage zero-crossing detector is designed to enable DCM operation with both low supply voltage and normal supply voltage. The proposed buck converter achieves a peak efficiency of 94% with an output current range of 50μA to 10mA. Thanks to the DCM operation, the efficiency at an output current of 100μA is improved by 20% and 9%, with an output voltage of 0.35V and 0.5V, respectively.

原文	English
主出版物標題	Proceedings of the 2013 IEEE Asian Solid-State Circuits Conference, A-SSCC 2013
頁面	45-48
頁數	4
DOIs	https://doi.org/10.1109/ASSCC.2013.6690978
出版狀態	Published - 1 12月 2013
事件	2013 9th IEEE Asian Solid-State Circuits Conference, A-SSCC 2013 - Singapore, Singapore 持續時間: 11 11月 2013 → 13 11月 2013

出版系列

名字	Proceedings of the 2013 IEEE Asian Solid-State Circuits Conference, A-SSCC 2013

Conference

Conference	2013 9th IEEE Asian Solid-State Circuits Conference, A-SSCC 2013
國家/地區	Singapore
城市	Singapore
期間	11/11/13 → 13/11/13

存取文件

10.1109/ASSCC.2013.6690978

其它文件與鏈接

Link to publication in Scopus

引用此

Zhang, X., Okuma, Y., Chen, P-H., Ishida, K., Ryu, Y., Watanabe, K., Sakurai, T., & Takamiya, M. (2013). A 0.6-V input 94% peak efficiency CCM/DCM digital buck converter in 40-nm CMOS with dual-mode-body-biased zero-crossing detector. 於 Proceedings of the 2013 IEEE Asian Solid-State Circuits Conference, A-SSCC 2013 (頁 45-48). [6690978] (Proceedings of the 2013 IEEE Asian Solid-State Circuits Conference, A-SSCC 2013). https://doi.org/10.1109/ASSCC.2013.6690978

@inproceedings{e5224af9d8a0494192105a06a307905a,

title = "A 0.6-V input 94% peak efficiency CCM/DCM digital buck converter in 40-nm CMOS with dual-mode-body-biased zero-crossing detector",

abstract = "A 0.6-V input, 0.3-0.55V output buck converter is developed in 40-nm CMOS, for low-voltage low-power wireless sensor network systems. The buck converter is able to automatically select DCM or CCM operation, therefore improving the power efficiency and enlarging the output current range, by virtue of the proposed low-power CCM/DCM controller. A dual-mode-body-biased (DMBB) (forward body bias & zero body bias) low-voltage zero-crossing detector is designed to enable DCM operation with both low supply voltage and normal supply voltage. The proposed buck converter achieves a peak efficiency of 94% with an output current range of 50μA to 10mA. Thanks to the DCM operation, the efficiency at an output current of 100μA is improved by 20% and 9%, with an output voltage of 0.35V and 0.5V, respectively.",

author = "Xin Zhang and Yasuyuki Okuma and Po-Hung Chen and Koichi Ishida and Yoshikatsu Ryu and Kazumori Watanabe and Takayasu Sakurai and Makoto Takamiya",

year = "2013",

month = dec,

day = "1",

doi = "10.1109/ASSCC.2013.6690978",

language = "English",

isbn = "9781479902781",

series = "Proceedings of the 2013 IEEE Asian Solid-State Circuits Conference, A-SSCC 2013",

pages = "45--48",

booktitle = "Proceedings of the 2013 IEEE Asian Solid-State Circuits Conference, A-SSCC 2013",

note = "null ; Conference date: 11-11-2013 Through 13-11-2013",

}

Zhang, X, Okuma, Y, Chen, P-H, Ishida, K, Ryu, Y, Watanabe, K, Sakurai, T & Takamiya, M 2013, A 0.6-V input 94% peak efficiency CCM/DCM digital buck converter in 40-nm CMOS with dual-mode-body-biased zero-crossing detector. 於 Proceedings of the 2013 IEEE Asian Solid-State Circuits Conference, A-SSCC 2013., 6690978, Proceedings of the 2013 IEEE Asian Solid-State Circuits Conference, A-SSCC 2013, 頁 45-48, 2013 9th IEEE Asian Solid-State Circuits Conference, A-SSCC 2013, Singapore, Singapore, 11/11/13. https://doi.org/10.1109/ASSCC.2013.6690978

A 0.6-V input 94% peak efficiency CCM/DCM digital buck converter in 40-nm CMOS with dual-mode-body-biased zero-crossing detector. / Zhang, Xin; Okuma, Yasuyuki; Chen, Po-Hung 等.

Proceedings of the 2013 IEEE Asian Solid-State Circuits Conference, A-SSCC 2013. 2013. p. 45-48 6690978 (Proceedings of the 2013 IEEE Asian Solid-State Circuits Conference, A-SSCC 2013).

研究成果: Conference contribution › 同行評審

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AU - Zhang, Xin

AU - Okuma, Yasuyuki

AU - Chen, Po-Hung

AU - Ishida, Koichi

AU - Ryu, Yoshikatsu

AU - Watanabe, Kazumori

AU - Sakurai, Takayasu

AU - Takamiya, Makoto

PY - 2013/12/1

Y1 - 2013/12/1

N2 - A 0.6-V input, 0.3-0.55V output buck converter is developed in 40-nm CMOS, for low-voltage low-power wireless sensor network systems. The buck converter is able to automatically select DCM or CCM operation, therefore improving the power efficiency and enlarging the output current range, by virtue of the proposed low-power CCM/DCM controller. A dual-mode-body-biased (DMBB) (forward body bias & zero body bias) low-voltage zero-crossing detector is designed to enable DCM operation with both low supply voltage and normal supply voltage. The proposed buck converter achieves a peak efficiency of 94% with an output current range of 50μA to 10mA. Thanks to the DCM operation, the efficiency at an output current of 100μA is improved by 20% and 9%, with an output voltage of 0.35V and 0.5V, respectively.

AB - A 0.6-V input, 0.3-0.55V output buck converter is developed in 40-nm CMOS, for low-voltage low-power wireless sensor network systems. The buck converter is able to automatically select DCM or CCM operation, therefore improving the power efficiency and enlarging the output current range, by virtue of the proposed low-power CCM/DCM controller. A dual-mode-body-biased (DMBB) (forward body bias & zero body bias) low-voltage zero-crossing detector is designed to enable DCM operation with both low supply voltage and normal supply voltage. The proposed buck converter achieves a peak efficiency of 94% with an output current range of 50μA to 10mA. Thanks to the DCM operation, the efficiency at an output current of 100μA is improved by 20% and 9%, with an output voltage of 0.35V and 0.5V, respectively.

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T3 - Proceedings of the 2013 IEEE Asian Solid-State Circuits Conference, A-SSCC 2013

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BT - Proceedings of the 2013 IEEE Asian Solid-State Circuits Conference, A-SSCC 2013

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ER -

Zhang X, Okuma Y, Chen P-H, Ishida K, Ryu Y, Watanabe K 等. A 0.6-V input 94% peak efficiency CCM/DCM digital buck converter in 40-nm CMOS with dual-mode-body-biased zero-crossing detector. 於 Proceedings of the 2013 IEEE Asian Solid-State Circuits Conference, A-SSCC 2013. 2013. p. 45-48. 6690978. (Proceedings of the 2013 IEEE Asian Solid-State Circuits Conference, A-SSCC 2013). doi: 10.1109/ASSCC.2013.6690978

A 0.6-V input 94% peak efficiency CCM/DCM digital buck converter in 40-nm CMOS with dual-mode-body-biased zero-crossing detector

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