TY - GEN
T1 - A 0.12-V 200-Hz-BW 10-Bit ADC Using Quad-Channel VCO and Interpolation Linearization
AU - Smith, Shea
AU - Barton, Taylor
AU - Kuan, Yen Cheng
AU - Tajalli, Armin
AU - Chang, Mau Chung Frank
AU - Chiang, Shiuh Hua Wood
N1 - Publisher Copyright:
© 2023 IEEE.
PY - 2023
Y1 - 2023
N2 - Wireless IoT devices operating remotely benefit from energy harvesting to ensure continuous operation. Energy harvesters typically generate output voltages in the range of a few 10's mV to 100's mV, thus requiring a voltage booster to power the CMOS circuits that operate at a nominal supply of 1 V. However, this voltage conversion incurs loss and its efficiency decreases as the voltage differential increases. Therefore, from a systems perspective, there is a need for CMOS circuits that can operate close to the native energy harvester output voltage. Most IoT devices require low-power ADCs to digitize signals and the data rate may be low in many applications. Several previous works have demonstrated deep-subthreshold ADCs. VCO-based quantizers [1]-[3], and a low-supply comparator [4] are used in 0.2-V ADCs. The delta-sigma ADC [5] operates under a 0.15-V supply but can support only sub-Hz bandwidth. In this work, we propose a 0.12-V 10-bit 200-Hz-BW ADC based on a quad-channel VCO architecture. This work represents the lowest supply reported for an ADC to the best of our knowledge.
AB - Wireless IoT devices operating remotely benefit from energy harvesting to ensure continuous operation. Energy harvesters typically generate output voltages in the range of a few 10's mV to 100's mV, thus requiring a voltage booster to power the CMOS circuits that operate at a nominal supply of 1 V. However, this voltage conversion incurs loss and its efficiency decreases as the voltage differential increases. Therefore, from a systems perspective, there is a need for CMOS circuits that can operate close to the native energy harvester output voltage. Most IoT devices require low-power ADCs to digitize signals and the data rate may be low in many applications. Several previous works have demonstrated deep-subthreshold ADCs. VCO-based quantizers [1]-[3], and a low-supply comparator [4] are used in 0.2-V ADCs. The delta-sigma ADC [5] operates under a 0.15-V supply but can support only sub-Hz bandwidth. In this work, we propose a 0.12-V 10-bit 200-Hz-BW ADC based on a quad-channel VCO architecture. This work represents the lowest supply reported for an ADC to the best of our knowledge.
UR - http://www.scopus.com/inward/record.url?scp=85182264963&partnerID=8YFLogxK
U2 - 10.1109/A-SSCC58667.2023.10347931
DO - 10.1109/A-SSCC58667.2023.10347931
M3 - Conference contribution
AN - SCOPUS:85182264963
T3 - 2023 IEEE Asian Solid-State Circuits Conference, A-SSCC 2023
BT - 2023 IEEE Asian Solid-State Circuits Conference, A-SSCC 2023
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 19th IEEE Asian Solid-State Circuits Conference, A-SSCC 2023
Y2 - 5 November 2023 through 8 November 2023
ER -