9.9-mA 5-6 GHz CMOS sub-harmonic direct-conversion receiver using deep n-well BJT

Wei Ling Chang; Chin-Chun Meng; Jin Siang Syu; Chia Ling Wang; Guo Wei Huang

doi:10.1109/SiRF.2014.6828507

9.9-mA 5-6 GHz CMOS sub-harmonic direct-conversion receiver using deep n-well BJT

Wei Ling Chang, Chin-Chun Meng, Jin Siang Syu, Chia Ling Wang, Guo Wei Huang

電機工程學系

研究成果 › 同行評審

摘要

A low-power sub-harmonic direct-down receiver is demonstrated using 0.18 μm CMOS technology. The dynamic range of the receiver is increased by incorporating voltage gain controls with wide tuning range at RF and IF stages. For the flicker noise problem, vertical-NPN bipolar junction transistors (BJTs) in standard CMOS process are employed as the mixer switching core and at the input stage of the subsequent IF VGA. As a result, this work achieves a 45 dB gain from 5-6 GHz with 6 dB noise floor. The total current consumption is 5.5 mA at 1.8 V supply voltage.

原文	American English
頁面	47-49
頁數	3
DOIs	https://doi.org/10.1109/SiRF.2014.6828507
出版狀態	Published - 1 1月 2014
事件	2014 IEEE 14th Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems, SiRF 2014 - Newport Beach, CA, 美國持續時間: 19 1月 2014 → 23 1月 2014

Conference

Conference	2014 IEEE 14th Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems, SiRF 2014
國家/地區	美國
城市	Newport Beach, CA
期間	19/01/14 → 23/01/14

存取文件

10.1109/SiRF.2014.6828507

其它文件與鏈接

Link to publication in Scopus

引用此

@conference{30eee54972c349bfac937a6e322aa62e,

title = "9.9-mA 5-6 GHz CMOS sub-harmonic direct-conversion receiver using deep n-well BJT",

abstract = "A low-power sub-harmonic direct-down receiver is demonstrated using 0.18 μm CMOS technology. The dynamic range of the receiver is increased by incorporating voltage gain controls with wide tuning range at RF and IF stages. For the flicker noise problem, vertical-NPN bipolar junction transistors (BJTs) in standard CMOS process are employed as the mixer switching core and at the input stage of the subsequent IF VGA. As a result, this work achieves a 45 dB gain from 5-6 GHz with 6 dB noise floor. The total current consumption is 5.5 mA at 1.8 V supply voltage.",

keywords = "8-phase signal generator, Deep n-well vertical-NPN bipolar junction transistor, Direct-conversion receiver, Low flicker noise, Low power, Sub-harmonic mixer",

author = "Chang, {Wei Ling} and Chin-Chun Meng and Syu, {Jin Siang} and Wang, {Chia Ling} and Huang, {Guo Wei}",

year = "2014",

month = jan,

day = "1",

doi = "10.1109/SiRF.2014.6828507",

language = "American English",

pages = "47--49",

note = "2014 IEEE 14th Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems, SiRF 2014 ; Conference date: 19-01-2014 Through 23-01-2014",

}

TY - CONF

T1 - 9.9-mA 5-6 GHz CMOS sub-harmonic direct-conversion receiver using deep n-well BJT

AU - Chang, Wei Ling

AU - Meng, Chin-Chun

AU - Syu, Jin Siang

AU - Wang, Chia Ling

AU - Huang, Guo Wei

PY - 2014/1/1

Y1 - 2014/1/1

N2 - A low-power sub-harmonic direct-down receiver is demonstrated using 0.18 μm CMOS technology. The dynamic range of the receiver is increased by incorporating voltage gain controls with wide tuning range at RF and IF stages. For the flicker noise problem, vertical-NPN bipolar junction transistors (BJTs) in standard CMOS process are employed as the mixer switching core and at the input stage of the subsequent IF VGA. As a result, this work achieves a 45 dB gain from 5-6 GHz with 6 dB noise floor. The total current consumption is 5.5 mA at 1.8 V supply voltage.

AB - A low-power sub-harmonic direct-down receiver is demonstrated using 0.18 μm CMOS technology. The dynamic range of the receiver is increased by incorporating voltage gain controls with wide tuning range at RF and IF stages. For the flicker noise problem, vertical-NPN bipolar junction transistors (BJTs) in standard CMOS process are employed as the mixer switching core and at the input stage of the subsequent IF VGA. As a result, this work achieves a 45 dB gain from 5-6 GHz with 6 dB noise floor. The total current consumption is 5.5 mA at 1.8 V supply voltage.

KW - 8-phase signal generator

KW - Deep n-well vertical-NPN bipolar junction transistor

KW - Direct-conversion receiver

KW - Low flicker noise

KW - Low power

KW - Sub-harmonic mixer

UR - http://www.scopus.com/inward/record.url?scp=84903841410&partnerID=8YFLogxK

U2 - 10.1109/SiRF.2014.6828507

DO - 10.1109/SiRF.2014.6828507

M3 - Paper

AN - SCOPUS:84903841410

SP - 47

EP - 49

T2 - 2014 IEEE 14th Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems, SiRF 2014

Y2 - 19 January 2014 through 23 January 2014

ER -

9.9-mA 5-6 GHz CMOS sub-harmonic direct-conversion receiver using deep n-well BJT

摘要

Conference

存取文件

其它文件與鏈接

指紋

引用此