65dBHD3 CMOS tunable OTA with mobility reduction compensation

Shih Tung Cheng*, Wei Hsiu Chang, Chung-Chih Hung

*此作品的通信作者

研究成果: Conference contribution同行評審

摘要

This paper presents a high linearity operational transconductance amplifier (OTA) base on the technique of mobility reduction compensation, which achieves great linearity improvement and has wide input range at low power consumption. The third-order harmonic distortion (HD3) of the OTA is about 65dB at 1MHz for a 1.2-Vpp differential input. The OTA was designed by the TSMC 0.18-μm CMOS process technology. For 1.8-V supply voltage, the static power consumption is only 0.427mW.

原文English
主出版物標題Proceedings of 2011 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2011
頁面358-361
頁數4
DOIs
出版狀態Published - 2011
事件2011 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2011 - Hsinchu, Taiwan
持續時間: 25 4月 201128 4月 2011

出版系列

名字Proceedings of 2011 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2011

Conference

Conference2011 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2011
國家/地區Taiwan
城市Hsinchu
期間25/04/1128/04/11

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