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3D synaptic architecture with ultralow sub-10 fJ energy per spike for neuromorphic computation

  • I. Ting Wang
  • , Yen Chuan Lin
  • , Yu Fen Wang
  • , Chung Wei Hsu
  • , Tuo-Hung Hou

    研究成果: Conference article同行評審

    48 引文 斯高帕斯(Scopus)

    摘要

    A high-density 3D synaptic architecture based on self-rectifying Ta/TaOx/TiO2/Ti RRAM is proposed as an energy- and cost-efficient neuromorphic computation hardware. The device shows excellent analog synaptic features that can be accurately described by the physical and compact models. Ultra-low energy consumption comparable to that of a biological synapse (<10 fJ/spike) has been demonstrated for the first time.

    原文English
    文章編號7047127
    頁(從 - 到)28.5.1-28.5.4
    頁數4
    期刊Technical Digest - International Electron Devices Meeting, IEDM
    2015-February
    發行號February
    DOIs
    出版狀態Published - 15 12月 2015
    事件2014 60th IEEE International Electron Devices Meeting, IEDM 2014 - San Francisco, 美國
    持續時間: 15 12月 201417 12月 2014

    UN SDG

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    1. SDG 7 - 經濟實惠的清潔能源
      SDG 7 經濟實惠的清潔能源

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