2Gs/s HBT sample and hold

Ken Poulton*, James S. Kang, John J. Corcoran, Keh Chung Wang, Peter M. Asbeck, Mau-Chung Chang, Gerard Sullivan

*此作品的通信作者

    研究成果: Paper同行評審

    13 引文 斯高帕斯(Scopus)

    摘要

    The authors describe a Schottky-diode sample-and-hold (S/H) circuit fabricated in an AlGaAs/GaAs heterojunction bipolar transistor (HBT) process. The transistors exhibit an fT of over 50 GHz. The S/H circuit operates at up to 2G samples/s, with distortion below-40 dBc up to and beyond the Nyquist input frequency of 1 GHz.

    原文English
    頁面199-202
    頁數4
    DOIs
    出版狀態Published - 1 12月 1988

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