17.7 A 0.03mV/mA Low Crosstalk and 185nA Ultra-Low-Quiescent Single-Inductor Multiple-Output Converter Assisted by 5-Input Operational Amplifier for 94.3% Peak Efficiency and 3.0W Driving Capability

Tzu Hsien Yang, Yong Hwa Wen, Yu Jheng Ouyang, Chun Kai Chiu, Bo Kuan Wu, Ke Horng Chen, Ying Hsi Lin, Shian Ru Lin, Tsung Yen Tsai

    研究成果: Conference contribution同行評審

    摘要

    The single-inductor multi-output (SIMO) converter offers the advantage of small size and can provide distributive voltage/current for wearable electronic devices. However, there are still some design challenges to solve. In continuous-conduction-mode (CCM) control, it is difficult to reduce crosstalk between multiple outputs [1- 5]. Any crosstalk will result in excessive or insufficient energy in other outputs, resulting in severe voltage ripple. In the upper left of Fig. 17.7.1, when there is any load change on \mathrm{V}_{O2}, crosstalk will occur at \mathrm{V}_{O1} and \mathrm{V}_{O4}. On the other hand, in the discontinuous-conduction-mode (DCM) control [6, 7], if any one of the multiple outputs changes from light load to heavy load, serious crosstalk occurs due to the extension of the switching period \mathrm{T}_{SW}, as shown in the upper right of Fig. 17.7.1. Although constant frequency control can avoid the expansion of \mathrm{T}_{SW} [8], the limited peak inductor current will reduce the driving capability (\mathrm{I}_{LOAD(MAX)} \quad =100 mA [8]). In this paper, the proposed SIMO converter, shown at the bottom left of Fig. 17.7.1, uses an adaptive switchable CCM and DCM (ASCD) technique that takes advantage of the high driving capability of CCM and the advantage of reducing crosstalk in DCM under light loads. To effectively reduce the crosstalk in CCM (Mode1 in this paper), a 5-input crosstalk-reduction error amplifier (CREA) with a feedback rotator is proposed to reduce the shortcomings of hardware overhead in [1- 10]. For achieving low crosstalk and high driving capability under medium load, the SIMO converter works in a combination of stacked DCM and sequential DCM, which are classified as Mode2 to Mode4 to change the energy distribution path of each output (Fig. 17.7.1 bottom right). Under ultra-light load conditions, the switching cycle \mathrm{T}_{SW} can be extended to reduce switching power loss, and SIMO will enter the ultra-low-power (ULP) mode (Mode5) to further reduce the quiescent current and increase the battery runtime.

    原文English
    主出版物標題2021 IEEE International Solid-State Circuits Conference, ISSCC 2021 - Digest of Technical Papers
    發行者Institute of Electrical and Electronics Engineers Inc.
    頁面267-269
    頁數3
    ISBN(電子)9781728195490
    DOIs
    出版狀態Published - 13 二月 2021
    事件2021 IEEE International Solid-State Circuits Conference, ISSCC 2021 - San Francisco, United States
    持續時間: 13 二月 202122 二月 2021

    出版系列

    名字Digest of Technical Papers - IEEE International Solid-State Circuits Conference
    64
    ISSN(列印)0193-6530

    Conference

    Conference2021 IEEE International Solid-State Circuits Conference, ISSCC 2021
    國家/地區United States
    城市San Francisco
    期間13/02/2122/02/21

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