1.3 kV Vertical GaN-Based Trench MOSFETs on 4-Inch Free Standing GaN Wafer

Wei He, Jian Li, Zeliang Liao, Feng Lin, Junye Wu, Bing Wang, Maojun Wang, Nan Liu, Hsien Chin Chiu, Hao Chung Kuo, Xinnan Lin, Jingbo Li, Xinke Liu*

*此作品的通信作者

研究成果: Article同行評審

2 引文 斯高帕斯(Scopus)

摘要

In this work, a vertical gallium nitride (GaN)-based trench MOSFET on 4-inch free-standing GaN substrate is presented with threshold voltage of 3.15 V, specific on-resistance of 1.93 mΩ·cm2, breakdown voltage of 1306 V, and figure of merit of 0.88 GW/cm2. High-quality and stable MOS interface is obtained through two-step process, including simple acid cleaning and a following (NH4)2S passivation. Based on the calibration with experiment, the simulation results of physical model are consistent well with the experiment data in transfer, output, and breakdown characteristic curves, which demonstrate the validity of the simulation data obtained by Silvaco technology computer aided design (Silvaco TCAD). The mechanisms of on-state and breakdown are thoroughly studied using Silvaco TCAD physical model. The device parameters, including n-GaN drift layer, p-GaN channel layer and gate dielectric layer, are systematically designed for optimization. This comprehensive analysis and optimization on the vertical GaN-based trench MOSFETs provide significant guide for vertical GaN-based high power applications.

原文English
文章編號14
期刊Nanoscale Research Letters
17
發行號1
DOIs
出版狀態Published - 2022

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