TY - GEN
T1 - 10-bit SAR ADC with novel pseudo-random capacitor switching scheme
AU - Hsu, Pai Hsiang
AU - Lee, Yueh Ru
AU - Hung, Chung Chih
PY - 2019/4
Y1 - 2019/4
N2 - This paper presents a pseudo-random capacitor switching scheme. Taking 1% of capacitor mismatch into account, after applying the pseudo-random switching scheme to the SAR ADC matlab behavioral model, for 500 Monte Carlo simulations, the missing code (Minimum DNL=-1) occurrence is reduced from 176 to 3, and the other performance indicators are also improved significantly. The circuit was fabricated by using 0.18-μm 1P6M TSMC CMOS process. With a sampling rate of 1KS/s and 50Hz input frequency, the measured SNDR and SFDR achieves 57.11dB and 75.37dB respectively while consuming a power of 7.68μW. With a sampling rate of 48KS/s and 500Hz input frequency, the measured SNDR and SFDR achieves 56.91dB and 74.47dB respectively while consuming a power of 7.93μW. With a sampling rate of 1MS/s and 50KHz input frequency, the measured SNDR and SFDR achieves 58.71dB and 77.89dB respectively while consuming a power of 102μW. The measured INL is 0.54/-0.78 LSB, and DNL is 0.67/-0.82 LSB. The circuit is applicable for various bio-medical applications.
AB - This paper presents a pseudo-random capacitor switching scheme. Taking 1% of capacitor mismatch into account, after applying the pseudo-random switching scheme to the SAR ADC matlab behavioral model, for 500 Monte Carlo simulations, the missing code (Minimum DNL=-1) occurrence is reduced from 176 to 3, and the other performance indicators are also improved significantly. The circuit was fabricated by using 0.18-μm 1P6M TSMC CMOS process. With a sampling rate of 1KS/s and 50Hz input frequency, the measured SNDR and SFDR achieves 57.11dB and 75.37dB respectively while consuming a power of 7.68μW. With a sampling rate of 48KS/s and 500Hz input frequency, the measured SNDR and SFDR achieves 56.91dB and 74.47dB respectively while consuming a power of 7.93μW. With a sampling rate of 1MS/s and 50KHz input frequency, the measured SNDR and SFDR achieves 58.71dB and 77.89dB respectively while consuming a power of 102μW. The measured INL is 0.54/-0.78 LSB, and DNL is 0.67/-0.82 LSB. The circuit is applicable for various bio-medical applications.
KW - High-performance
KW - Low power
KW - Pseudo-random
KW - Successive-approximation-register analog-to-digital converter
UR - http://www.scopus.com/inward/record.url?scp=85068618571&partnerID=8YFLogxK
U2 - 10.1109/VLSI-DAT.2019.8741534
DO - 10.1109/VLSI-DAT.2019.8741534
M3 - Conference contribution
AN - SCOPUS:85068618571
T3 - 2019 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2019
BT - 2019 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2019
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 2019 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2019
Y2 - 22 April 2019 through 25 April 2019
ER -