1-V full-swing depletion-load a-In-Ga-Zn-O inverters for back-end-of-line compatible 3D integration

Li Jen Chi, Ming Jiue Yu, Yu Hong Chang, Tuo-Hung Hou*

*此作品的通信作者

研究成果: Article同行評審

18 引文 斯高帕斯(Scopus)

摘要

To enable monolithic three-dimensional integration of the amorphous In-Ga-Zn-O (a-IGZO) and CMOS technologies, the a-IGZO inverters compatible with the low operating voltage (≤1 V) and process temperature of back-end-of-line CMOS have been investigated. We demonstrated a full-swing depletion-load inverter with a voltage gain up to 24 using a CMOS-compatible operating voltage of 1 V. The drive transistor was realized using a low-voltage enhancement-mode a-IGZO thin-film transistor (TFT) with a steep subthreshold swing of 70 mV/decade and a low threshold voltage of 0.5 V. The load transistor was implemented using a bi-layer a-IGZO channel, where the a-IGZO composition was modulated simply by the oxygen flow rate in a depletion-mode TFT.

原文English
文章編號7420606
頁(從 - 到)441-444
頁數4
期刊IEEE Electron Device Letters
37
發行號4
DOIs
出版狀態Published - 1 4月 2016

指紋

深入研究「1-V full-swing depletion-load a-In-Ga-Zn-O inverters for back-end-of-line compatible 3D integration」主題。共同形成了獨特的指紋。

引用此