The process technologies and the device performance of the SA-STI cell, which can be used to realize NAND EEPROMs of 256 Mbit and beyond is described. This structure reduces the cell size without scaling of the device dimension. The operation method for the NAND cell was also developed. A bi-polarity Fowler-Nordheim tunneling write/erase method can be used since this method achieves high reliability, high-speed programming and small sector size, which makes it a most promising candidate to replace magnetic disk memory.
|頁（從 - 到）||61-64|
|期刊||Technical Digest - International Electron Devices Meeting|
|出版狀態||Published - 1 12月 1994|
|事件||Proceedings of the 1994 IEEE International Electron Devices Meeting - San Francisco, CA, USA|
持續時間: 11 12月 1994 → 14 12月 1994