0.13-μm low-κ-Cu CMOS logic-based technology for 2.1-Gb high data rate read-channel

Jyh-Chyurn Guo*, W. Y. Lien, T. L. Tsai, S. M. Chen, C. M. Wu

*此作品的通信作者

    研究成果: Article同行評審

    4 引文 斯高帕斯(Scopus)

    摘要

    High-performance analog/digital elements have been successfully fabricated bya 0.13-μm low-κ-Cu logic-based mixed-signal CMOS process in a single chip to enable a 2.1-Gb/s read-channel for hard disk drives that is a record-high data rate supported by fully CMOS solution. The high-performance analog devices demonstrate superior drivability, matching, noise immunity, and reliability by a unique dual-gate oxide module to support the aggressive oxide thickness scaling and maintain promisingly good reliability in all aspects.

    原文English
    頁(從 - 到)757-763
    頁數7
    期刊IEEE Transactions on Electron Devices
    51
    發行號5
    DOIs
    出版狀態Published - 1 5月 2004

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