Yu-Min Lee – 研究成果 — 國立陽明交通大學研發優勢分析平台

查看斯高帕斯 (Scopus) 概要

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每年研究成果

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35 Conference contribution
15 Article
4 Paper
2 Conference article

15結果

篩選

2023
Phone-nomenon 2.0: A compact thermal model for smartphones
Lee, Y. M., Chiou, H. W., Shiau, S., Pan, C. W. & Ting, S. H., 2023, (Accepted/In press) 於: IET Computers and Digital Techniques.
研究成果: Article › 同行評審

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2017
InTraSim: Incremental Transient Simulation of Power Grids
Lee, Y-M. & Ho, C. T., 1 12月 2017, 於: IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. 36, 12, p. 2052-2065 14 p., 7875506.
研究成果: Article › 同行評審
3 引文斯高帕斯（Scopus）
NaPer: A TSV Noise-Aware Placer
Lee, Y-M., Pan, K. T. & Chen, C., 1 5月 2017, 於: IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 25, 5, p. 1703-1713 11 p., 7822965.
研究成果: Article › 同行評審
1 引文斯高帕斯（Scopus）
2015
LUTSim: A Look-Up Table-Based Thermal Simulator for 3-D ICs
Lee, Y-M., Pan, C. W., Huang, P. Y. & Yang, C. P., 1 8月 2015, 於: IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. 34, 8, p. 1250-1263 14 p., 7036103.
研究成果: Article › 同行評審
6 引文斯高帕斯（Scopus）
2013
An efficient method for analyzing on-chip thermal reliability considering process variations
Lee, Y-M. & Huang, P. Y., 1 1月 2013, 於: ACM Transactions on Design Automation of Electronic Systems. 18, 3, 2491485.
研究成果: Article › 同行評審
2 引文斯高帕斯（Scopus）
2010
Redundant via insertion with wire spreading capability
Lee, Y-M. & Pan, C. W., 12月 2010, 於: International Journal of Electrical Engineering. 17, 6, p. 383-397 15 p.
研究成果: Article › 同行評審
2009
Effective sleep transistor sizing algorithm for leakage power reduction
Lee, Y-M. & Chiang, P. Y., 1 10月 2009, 於: International Journal of Electrical Engineering. 16, 5, p. 421-431 11 p.
研究成果: Article › 同行評審
Full-Chip thermal analysis for the early design stage via generalized integral transforms
Huang, P. Y. & Lee, Y-M., 1 5月 2009, 於: IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 17, 5, p. 613-626 14 p., 4799219.
研究成果: Article › 同行評審
31 引文斯高帕斯（Scopus）
Hierarchical power delivery network analysis via bipartite markov chains
Huang, P. Y. & Lee, Y-M., 1 4月 2009, 於: International Journal of Electrical Engineering. 16, 2, p. 121-132 12 p.
研究成果: Article › 同行評審
2005
HiPRIME: Hierarchical and passivity preserved interconnect macromodeling engine for RLKC power delivery
Lee, Y-M., Cao, Y., Chen, T. H., Wang, J. M. & Chen, C. C. P., 1 6月 2005, 於: IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. 24, 6, p. 797-806 10 p.
研究成果: Article › 同行評審
4 引文斯高帕斯（Scopus）
2003
The power grid transient simulation in linear time based on 3-D alternating-direction-implicit method
Lee, Y-M. & Chen, C. C. P., 1 11月 2003, 於: IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. 22, 11, p. 1545-1550 6 p.
研究成果: Article › 同行評審
12 引文斯高帕斯（Scopus）
2002
Optimal wire-sizing function under the Elmore delay model with bounded wire sizes
Lee, Y-M., Chen, C. C. P. & Wong, D. F., 1 11月 2002, 於: IEEE Transactions on Circuits and Systems I: Fundamental Theory and Applications. 49, 11, p. 1671-1677 7 p.
研究成果: Article › 同行評審
12 引文斯高帕斯（Scopus）
Power grid transient simulation in linear time based on transmission-line-modeling alternating-direction-implicit method
Lee, Y-M. & Chen, C. C. P., 1 11月 2002, 於: IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. 21, 11, p. 1343-1352 10 p.
研究成果: Article › 同行評審
16 引文斯高帕斯（Scopus）
Simultaneous buffer-sizing and wire-sizing for clock trees based on lagrangian relaxation
Lee, Y-M., Chen, C. C. P., Chang, Y. W. & Wong, D. F., 30 1月 2002, 於: VLSI Design. 15, 3, p. 587-594 8 p.
研究成果: Article › 同行評審

開啟存取
4 引文斯高帕斯（Scopus）
1994

Phase Coherent Blind Equalization for High Order QAM Signals
Lee, T-S. & Lee, Y-M., 2月 1994, 於: Journal of the Chinese Institute of Electrical Engineers. 1, 1, p. 23-33
研究成果: Article › 同行評審