!!Projects per year
個人檔案
研究專長
VLSI設計自動化
經歷
1995/6~1995/12 Senior Engineer, ZyXEL Communications Corp., Hsinchu, Taiwan
2001/6~2001/9 Summer Intern, Intel Corp., Austin,Texas
教育/學術資格
PhD, 電機與電腦工程, University of Wisconsin-Madison
外部位置
指紋
查看啟用 Yu-Min Lee 的研究主題。這些主題標籤來自此人的作品。共同形成了獨特的指紋。
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過去五年中的合作和熱門研究領域
國家/地區層面的近期外部共同作業。按一下圓點深入探索詳細資料，或
專案
- 14 已完成
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FALCON-3D: Full-Chip Analytical Thermal Simulation with Lateral CONvection for 3D-Stacked ICs
Lu, T. L., Lee, Y. M., Huang, P. Y. & Wang, C. H., 2026, 2026 Design, Automation and Test in Europe Conference, DATE 2026 - Proceedings. Institute of Electrical and Electronics Engineers Inc., (Proceedings -Design, Automation and Test in Europe, DATE).研究成果 › 同行評審
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Thermal-Aware Chiplet Placement for 2.5D ICs with Sequence Pair Based Tree
Lee, Y. M., Chiou, H. W. & Jiang, J. H., 10 5月 2026, 於: ACM Transactions on Design Automation of Electronic Systems. 31, 3, 42.研究成果: Article › 同行評審
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ThPA: Thermal Simulation for Advanced ICs
Chen, B. W., Lin, Y. H., Lin, C. Y. & Lee, Y. M., 2026, ASP-DAC 2026 - 31st Asia and South Pacific Design Automation Conference, Proceedings. Institute of Electrical and Electronics Engineers Inc., p. 1407-1413 7 p. (Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC).研究成果 › 同行評審
1 引文 斯高帕斯（Scopus） -
MErBAG: Mesh Error Based Adaptive Grid Generation in System-Level Thermal Analysis
Lee, Y. M., Hsu, S. C., Tsai, B. Y. & Lu, Z. L., 2025, Proceedings of the 26th International Symposium on Quality Electronic Design, ISQED 2025. IEEE Computer Society, (Proceedings - International Symposium on Quality Electronic Design, ISQED).研究成果: Conference contribution › 同行評審
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Thermal Model Extraction at Chip Boundaries for Thermal Simulation of Chip in a System
Lin, K. X., Lee, Y. M. & Tsai, B. Y., 2025, Proceedings of the 26th International Symposium on Quality Electronic Design, ISQED 2025. IEEE Computer Society, (Proceedings - International Symposium on Quality Electronic Design, ISQED).研究成果: Conference contribution › 同行評審