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查看斯高帕斯 (Scopus) 概要
李 毅郎
教授
資訊科學與工程研究所
h-index
h10-index
h5-index
1210
引文
20
h-指數
按照存儲在普爾（Pure）的出版物數量及斯高帕斯（Scopus）引文計算。
370
引文
13
h-指數
按照存儲在普爾（Pure）的出版物數量及斯高帕斯（Scopus）引文計算。
158
引文
7
h-指數
按照存儲在普爾（Pure）的出版物數量及斯高帕斯（Scopus）引文計算。
1994 …
2026
每年研究成果
概覽
指紋
網路
計畫
(30)
研究成果
(90)
獎項
(6)
類似的個人檔案
(4)
指紋
查看啟用 Yih-Lang Li 的研究主題。這些主題標籤來自此人的作品。共同形成了獨特的指紋。
排序方式
重量
按字母排序
Computer Science
Routers
100%
Experimental Result
98%
Global Routing
71%
Transistor
27%
Antennas
23%
steiner tree
22%
Physical Design
22%
Floorplanning
20%
Routing Congestion
19%
Topology
19%
Cellular Automata
18%
Dynamic Programming
17%
Logic Synthesis
15%
Routing Problem
15%
Routing Algorithm
15%
Conflict Graph
15%
Design Automation
14%
Tree Construction
14%
Routing Resource
14%
Tree Search
12%
Routing Solution
11%
Buffer Insertion
11%
Global Placement
11%
Deep Learning Method
11%
Electronic Design Automation
10%
Machine Learning
10%
Learning System
10%
Logic Simulation
10%
Fault Simulation
10%
Reinforcement Learning
10%
Placement Solution
10%
Benchmark Circuit
9%
Completion Rate
9%
Programming Method
9%
Resource Utilisation
9%
Inductive Coupling
9%
Crosstalk Reduction
9%
Monte Carlo Simulation
9%
Timing Analysis
9%
Activity Recognition
9%
Linear Programming
9%
Graphics Processing Unit
9%
Convolutional Neural Network
9%
Arbitrary Size
9%
Steiner Tree Problem
8%
Computer Aided Design
8%
Antenna Violation
8%
Detailed Placement
7%
Timing Optimization
7%
Integrated Circuit Design
7%
Keyphrases
Router
58%
Global Routing
35%
Layer Assignment
24%
Maze Routing
22%
Cell Library
22%
Routability
20%
Detailed Routing
20%
Gridless Method
19%
Wirelength
18%
Antenna
15%
Cellular Automata
13%
Rerouting
13%
Route Graph
12%
Library Synthesis
11%
Integrated Circuits
11%
Graph-based
11%
Connection Graph
11%
Implicit Connection
11%
Pin Access
10%
Clock Tree Synthesis
10%
Rectilinear Steiner Tree
10%
Separator
10%
Layout Synthesis
10%
Cell Layout
10%
Full-chip
9%
Pin Accessibility
9%
Placer
9%
Grid Routing
9%
Obstacle-avoiding Rectilinear Steiner Tree
9%
Obstacle Avoidance
9%
Routing Congestion
9%
Simulation-based
9%
VLSI Design
9%
Absolute Temperature
9%
Emissivity
9%
Temperature Maps
9%
Coupling Effect
9%
Delay-aware
9%
Arbitrary Sizes
9%
Monte Carlo Tree Search
9%
Routability-Driven
9%
Aware Routing
8%
Steiner Point
8%
Routing System
7%
Fault Simulation
7%
Logic Simulation
7%
Timing Optimization
7%
Design Rule Violation
7%
Standard Cell Synthesis
7%
Overflow
7%
