Tuo-Hung Hou

每年研究成果

篩選

2015
3D synaptic architecture with ultralow sub-10 fJ energy per spike for neuromorphic computation
Wang, I. T., Lin, Y. C., Wang, Y. F., Hsu, C. W. & Hou, T.-H., 15 12月 2015, 於: Technical Digest - International Electron Devices Meeting, IEDM. 2015-February, February, p. 28.5.1-28.5.4 4 p., 7047127.
研究成果: Conference article › 同行評審
46 引文斯高帕斯（Scopus）
2004
Characterization of high-k gate dielectric and metal gate electrode semiconductor samples with a total reflection X-ray fluorescence spectrometer
Sparks, C. M., Beebe, M. R., Bennett, J., Foran, B., Gondran, C. & Hou, T.-H., 31 8月 2004, 於: Spectrochimica Acta - Part B Atomic Spectroscopy. 59, 8, p. 1227-1234 8 p.
研究成果: Conference article › 同行評審
12 引文斯高帕斯（Scopus）
2001
Conventional n-channel MOSFET devices using single layer HfO₂ and ZrO₂ as high-k gate dielectrics with polysilicon gate electrode
Kim, Y., Gebara, G., Freiler, M., Barnett, J., Riley, D., Chen, J., Torres, K., Lim, J. E., Foran, B., Shaapur, F., Agarwal, A., Lysaght, P., Brown, G. A., Young, C., Borthakur, S., Li, H. J., Nguyen, B., Zeitzoff, P., Bersuker, G. & Derro, D. 及其他9, Bergmann, R., Murto, R. W., Hou, T.-H., Huff, H. R., Shero, E., Pomarede, C., Givens, M., Mazanec, M. & Werkhoven, C., 1 12月 2001, 於: Technical Digest - International Electron Devices Meeting. p. 455-458 4 p.
研究成果: Conference article › 同行評審
95 引文斯高帕斯（Scopus）

侯 拓宏