Tuo-Hung Hou

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105 Article
74 Conference contribution
9 Patent
7 Paper
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100個結果中的 - 105105

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2001
Base oxide scaling limit of thermally-enhanced remote plasma nitridation (TE-RPN) process for ultra-thin gate dielectric formation
Yu, M. C., Huang, H. T., Chen, C. H., Wang, M. F., Hou, T-H., Lin, Y. M., Jang, S. M., Diaz, C. H., Sun, J., Fang, Y. K., Chen, S. C., Yu, C. H. & Liang, M. S., 10月 2001, 於: IEEE International Symposium on Semiconductor Manufacturing Conference, Proceedings. p. 179-182 4 p.
研究成果: Article › 同行評審
1 引文斯高帕斯（Scopus）
Thermally-enhanced remote plasma nitrided ultrathin (1.65 nm) gate oxide with excellent performances in reduction of leakage current and boron diffusion
Chen, C. H., Fang, Y. K., Yang, C. W., Ting, S. F., Tsair, Y. S., Yu, M. C., Hou, T-H., Wang, M. F., Chen, S. C., Yu, C. H. & Liang, M. S., 1 8月 2001, 於: IEEE Electron Device Letters. 22, 8, p. 378-380 3 p.
研究成果: Article › 同行評審
26 引文斯高帕斯（Scopus）
To optimize electrical properties of the ultrathin (1.6 nm) nitride/oxide gate stacks with bottom oxide materials and post-deposition treatment
Chen, C. H., Fang, Y. K., Yang, C. W., Ting, S. F., Tsair, Y. S., Wang, M. F., Hou, T-H., Yu, M. C., Chen, S. C., Jang, S. M., Yu, D. C. H. & Liang, M. S., 1 12月 2001, 於: IEEE Transactions on Electron Devices. 48, 12, p. 2769-2776 8 p.
研究成果: Article › 同行評審
1 引文斯高帕斯（Scopus）
Ultrathin Ox/Nitride gate stack for sub-quarter-micron CMOS devices prepared by RTCVD
Wang, M. F., Chen, C. H., Yu, M. C., Hou, T-H., Lin, Y. M., Chen, S. C., Fang, Y. K., Yu, C. H. & Liang, M. S., 4月 2001, 於: International Symposium on VLSI Technology, Systems, and Applications, Proceedings. p. 208-211 4 p.
研究成果: Article › 同行評審
1999
Improvement of junction leakage of nickel silicided junction by a Ti-capping layer
Hou, T-H., Lei, T. F. & Chao, T-S., 1 11月 1999, 於: IEEE Electron Device Letters. 20, 11, p. 572-573 2 p.
研究成果: Article › 同行評審
55 引文斯高帕斯（Scopus）

侯 拓宏

研究成果

搜尋結果

Base oxide scaling limit of thermally-enhanced remote plasma nitridation (TE-RPN) process for ultra-thin gate dielectric formation

Thermally-enhanced remote plasma nitrided ultrathin (1.65 nm) gate oxide with excellent performances in reduction of leakage current and boron diffusion

To optimize electrical properties of the ultrathin (1.6 nm) nitride/oxide gate stacks with bottom oxide materials and post-deposition treatment

Ultrathin Ox/Nitride gate stack for sub-quarter-micron CMOS devices prepared by RTCVD

Improvement of junction leakage of nickel silicided junction by a Ti-capping layer

侯拓宏