Tien-Sheng Chao

Article

Junctionless Nanosheet (3 nm) Poly-Si TFT: Electrical Characteristics and Superior Positive Gate Bias Stress Reliability

Lin, J. Y., Kumar, M. P. V. & Chao, T-S., 1 1月 2018, 於: IEEE Electron Device Letters. 39, 1, p. 8-11 4 p., 8126800.

研究成果: Article › 同行評審

18 引文斯高帕斯（Scopus）

Junctionless Poly-Si Nanowire Transistors with Low-Temperature Trimming Process for Monolithic 3-D IC Application

Lin, J. Y., Kuo, P. Y., Lin, K. L., Chin, C. C. & Chao, T-S., 1 12月 2016, 於: IEEE Transactions on Electron Devices. 63, 12, p. 4998-5003 6 p., 7676340.

研究成果: Article › 同行評審

18 引文斯高帕斯（Scopus）

Label-free and real-time detection of ferritin using a horn-like polycrystalline-silicon nanowire field-effect transistor biosensor

Yen, L. C., Pan, T. M., Lee, C. H. & Chao, T-S., 1 7月 2016, 於: Sensors and Actuators, B: Chemical. 230, p. 398-404 7 p.

研究成果: Article › 同行評審

29 引文斯高帕斯（Scopus）

Local electric-field-induced oxidation of titanium nitride films

Gwo, S., Yeh, C. L., Chen, P. F., Chou, Y. C., Chen, T. T., Chao, T-S., Hu, S. F. & Huang, T. Y., 1 12月 1999, 於: Applied Physics Letters. 74, 8, p. 1090-1092 3 p.

研究成果: Article › 同行評審

64 引文斯高帕斯（Scopus）

Localized lateral growth of single-walled carbon nanotubes for field-effect transistors by a cobalt-mix-TEOS method

Chen, B. H., Lo, P. Y., Wei, J. H., Tsai, M. J., Hwang, C. L., Chao, T-S., Lin, H-C. & Huang, T. Y., 7 10月 2005, 於: Electrochemical and Solid-State Letters. 8, 10

研究成果: Article › 同行評審

5 引文斯高帕斯（Scopus）

Low contact resistance of poly-plug structure by in-situ HF-vapour cleaning

Chen, J. H., Lei, T. F., Chao, T-S., Su, T. P., Huang, J., Tuan, A. & Chen, S. K., 13 4月 2000, 於: Electronics Letters. 36, 8, p. 756-757 2 p.

研究成果: Article › 同行評審

3 引文斯高帕斯（Scopus）

Low-operating-voltage ultrathin junctionless poly-si thin-film transistor technology for RF applications

Tsai, T. I., Chen, K. M., Lin, H-C., Lin, T. Y., Su, C. J., Chao, T-S. & Huang, T. Y., 21 9月 2012, 於: IEEE Electron Device Letters. 33, 11, p. 1565-1567 3 p., 6302168.

研究成果: Article › 同行評審

5 引文斯高帕斯（Scopus）

Low-temperature polycrystalline silicon thin-film flash memory with hafnium silicate

Lin, Y. H., Chien, C-H., Chou, T. H., Chao, T-S. & Lei, T. F., 1 3月 2007, 於: IEEE Transactions on Electron Devices. 54, 3, p. 531-536 6 p.

研究成果: Article › 同行評審

27 引文斯高帕斯（Scopus）

Low-temperature polycrystalline-silicon tunneling thin-film transistors with MILC

Chen, Y. H., Yen, L. C., Chang, T. S., Chiang, T. Y., Kuo, P. Y. & Chao, T-S., 7 8月 2013, 於: IEEE Electron Device Letters. 34, 8, p. 1017-1019 3 p., 6544264.

研究成果: Article › 同行評審

22 引文斯高帕斯（Scopus）

Low-temperature poly-Si nanowire junctionless devices with gate-all-around TiN/Al₂O₃ stack structure using an implant-free technique

Su, C. J., Tsai, T. I., Lin, H-C., Huang, T. Y. & Chao, T-S., 24 7月 2012, 於: Nanoscale Research Letters. 7, p. 1-14 14 p.

研究成果: Article › 同行評審

開啟存取

7 引文斯高帕斯（Scopus）

Measurement of Ultrathin (<100 A) Oxide Films by Multiple-Angle Incident Ellipsometry

Chao, T-S., Lee, C. L. & Lei, T. F., 1 1月 1991, 於: Journal of the Electrochemical Society. 138, 6, p. 1756-1761 6 p.

研究成果: Article › 同行評審

29 引文斯高帕斯（Scopus）

Mechanism of nitrogen coimplant for suppressing boron penetration in p⁺-polycrystalline silicon gate of p metal-oxide semiconductor field effect transistor

Chao, T-S., Liaw, M. C., Chu, C. H., Chang, C. Y., Chien, C-H., Hao, C. P. & Lei, T. F., 16 9月 1996, 於: Applied Physics Letters. 69, 12, p. 1781-1782 2 p.

研究成果: Article › 同行評審

28 引文斯高帕斯（Scopus）

Microwave annealing of phosphorus and cluster carbon implanted (100) and (110) Si

Cho, T. C., Lu, Y. L., Yao, J. Y., Lee, Y. J., Sekar, K., Tokoro, N., Onoda, H., Krull, W., Current, M. I. & Chao, T-S., 15 11月 2013, 於: ECS Journal of Solid State Science and Technology. 2, 7

研究成果: Article › 同行評審

2 引文斯高帕斯（Scopus）

MILC-TFT with high-κ dielectrics for one-time-programmable memory application

Chiang, T. Y., Ma, M. W., Wu, Y. H., Kuo, P. Y., Wang, K. T., Liao, C. C., Yeh, C. R. & Chao, T-S., 7 8月 2009, 於: IEEE Electron Device Letters. 30, 9, p. 954-956 3 p.

研究成果: Article › 同行評審

6 引文斯高帕斯（Scopus）

Mobility enhancement in local strain channel nMOSFETs by stacked a-Si/poly-Si gate and capping nitride

Lu, T. Y. & Chao, T-S., 1 4月 2005, 於: IEEE Electron Device Letters. 26, 4, p. 267-269 3 p.

研究成果: Article › 同行評審

18 引文斯高帕斯（Scopus）

Mobility enhancement of MOSFETs on p-silicon (111) with in situ HF-vapor pre-gate oxide cleaning

Chao, T-S., Lin, Y. H. & Yang, W. L., 1 9月 2004, 於: IEEE Electron Device Letters. 25, 9, p. 625-627 3 p.

研究成果: Article › 同行評審

3 引文斯高帕斯（Scopus）

Multiple-Angle Incident Ellipsometry Measurement on Low Pressure Chemical Vapor Deposited Amorphous Silicon and Polysilicon

Chao, T-S., Lee, C. L. & Lei, T. F., 1 1月 1994, 於: Journal of the Electrochemical Society. 141, 8, p. 2146-2151 6 p.

研究成果: Article › 同行評審

6 引文斯高帕斯（Scopus）

Nanometer-scale conversion of Si₃N₄ to SiO_x

Chien, F. S. S., Chang, J. W., Lin, S. W., Chou, Y. C., Chen, T. T., Gwo, S., Chao, T-S. & Hsieh, W. F., 17 1月 2000, 於: Applied Physics Letters. 76, 3, p. 360-362 3 p.

研究成果: Article › 同行評審

84 引文斯高帕斯（Scopus）

Nano-oxidation of silicon nitride films with an atomic force microscope: Chemical mapping, kinetics, and applications

Chien, F. S. S., Chou, Y. C., Chen, T. T., Hsieh, W. F., Chao, T-S. & Gwo, S., 15 2月 2001, 於: Journal of Applied Physics. 89, 4, p. 2465-2472 8 p.

研究成果: Article › 同行評審

58 引文斯高帕斯（Scopus）

Nanoscale p-MOS thin-film transistor with TiN gate electrode fabricated by low-temperature microwave dopant activation

Lu, Y. L., Hsueh, F. K., Huang, K. C., Cheng, T. Y., Kowalski, J. M., Kowalski, J. E., Lee, Y. J., Chao, T-S. & Wu, C. Y., 1 5月 2010, 於: IEEE Electron Device Letters. 31, 5, p. 437-439 3 p., 5427093.

研究成果: Article › 同行評審

16 引文斯高帕斯（Scopus）

New insights into breakdown modes and their evolution in ultra-thin gate oxide

Lin, H-C., Lee, D. Y., Lee, C. Y., Chao, T-S., Huang, T. Y. & Wang, T-H., 1 1月 2001, 於: International Symposium on VLSI Technology, Systems, and Applications, Proceedings. p. 37-40 4 p.

研究成果: Article › 同行評審

9 引文斯高帕斯（Scopus）

Nitridation of the Stacked Poly-Si Gate to Suppress the Boron Penetration in pMOS

Lin, Y. H., Lai, C. S., Lee, C. L., Lei, T. F. & Chao, T-S., 1 1月 1995, 於: IEEE Electron Device Letters. 16, 6, p. 248-249 2 p.

研究成果: Article › 同行評審

10 引文斯高帕斯（Scopus）

Nitride Induced Stress Affecting Crystallinity of Sidewall Damascene Gate-All-Around Nanowire Poly-Si FETs

Shen, C. H., Chen, W. Y., Lee, S. Y., Kuo, P. Y. & Chao, T. S., 1 1月 2020, 於: IEEE Transactions on Nanotechnology. 19, p. 322-327 6 p., 9044627.

研究成果: Article › 同行評審

1 引文斯高帕斯（Scopus）

Nitridization of the stacked poly-si gate to suppress the boron penetration in pMOS

Lin Hao, Y., Lai, C. S., Lee Lcn, C., Lei, T. F. & Chao, T-S., 1 12月 1996, 於: IEEE Transactions on Electron Devices. 43, 7, p. 1161-1165 5 p.

研究成果: Article › 同行評審

9 引文斯高帕斯（Scopus）

Nitrogen implantation and in situ HF vapor clean for deep submicrometer n-MOSFETs

Chen, J. H., Lei, T. F., Chen, C. L., Chao, T-S., Wen, Y. & Chen, K. T., 1 1月 2002, 於: Journal of the Electrochemical Society. 149, 1, p. G63-G69 8 p.

研究成果: Article › 同行評審

6 引文斯高帕斯（Scopus）

Nonvolatile memory characteristics with embedded hemispherical silicon nanocrystals

Chen, J. H., Lei, T. F., Landheer, D., Wu, X., Ma, M. W., Wu, W. C., Yang, T. Y. & Chao, T-S., 9 10月 2007, 於: Japanese Journal of Applied Physics, Part 1: Regular Papers and Short Notes and Review Papers. 46, 10 A, p. 6586-6588 3 p.

研究成果: Article › 同行評審

12 引文斯高帕斯（Scopus）

Novel 2-bit/cell wrapped-select-gate SONOS TFT memory using source-side injection for NOR-type flash array

Wang, K. T., Hsueh, F. C., Lu, Y. L., Chiang, T. Y., Wu, Y. H., Liao, C. C., Yen, L. C. & Chao, T-S., 10 5月 2012, 於: IEEE Electron Device Letters. 33, 6, p. 839-841 3 p., 6194261.

研究成果: Article › 同行評審

1 引文斯高帕斯（Scopus）

Novel bidirectional tunneling program/erase nor (binor)type flash eeprom

Yang, E. C. S., Liu, C. J., Liaw, M. C., Chao, T-S. & Hsu, C. C. H., 1 12月 1999, 於: IEEE Transactions on Electron Devices. 46, 6, 1 p.

研究成果: Article › 同行評審

1 引文斯高帕斯（Scopus）

Novel cleaning solutions for polysilicon film post chemical mechanical polishing

Pan, T. M., Lei, T. F., Chen, C. C., Chao, T-S., Liaw, M. C., Yang, W. L., Tsai, M. S., Lu, C. P. & Chang, W. H., 1 7月 2000, 於: IEEE Electron Device Letters. 21, 7, p. 338-340 3 p.

研究成果: Article › 同行評審

27 引文斯高帕斯（Scopus）

Novel field-induced gray-level selective patterning of self-assembled aminosilane monolayer on SiO₂ surfaces by scanning probe bond-breaking lithography

Wu, C. H., Lee, T. M., Sheu, J-T. & Chao, T-S., 1 4月 2009, 於: Japanese Journal of Applied Physics. 48, 4 PART 2, 04C133.

研究成果: Article › 同行評審

1 引文斯高帕斯（Scopus）

Novel ion bombardment technique for doping limited Cu source in SiO _x-based nonvolatile switching layer

Liu, S. H., Yang, W. L., Lin, Y. H., Wu, C. C. & Chao, T-S., 23 9月 2013, 於: IEEE Electron Device Letters. 34, 11, p. 1388-1390 3 p., 6603277.

研究成果: Article › 同行評審

12 引文斯高帕斯（Scopus）

Novel method of converting metallic-type carbon nanotubes to semiconducting-type carbon nanotube field-effect transistors

Chen, B. H., Wet, J. H., Lo, P. Y., Pei, Z. W., Chao, T-S., Lin, H-C. & Huang, T. Y., 25 4月 2006, 於: Japanese Journal of Applied Physics, Part 1: Regular Papers and Short Notes and Review Papers. 45, 4 B, p. 3680-3685 6 p.

研究成果: Article › 同行評審

14 引文斯高帕斯（Scopus）

Novel one-step aqueous solutions to replace pregate oxide cleans

Pan, T. M., Lei, T. F., Ko, F-H., Chao, T-S., Chiu, T. H. & Lu, C. P., 1 8月 2004, 於: IEEE Transactions on Semiconductor Manufacturing. 17, 3, p. 470-476 7 p.

研究成果: Article › 同行評審

4 引文斯高帕斯（Scopus）

Novel sacrificial gate stack process for suppression of boron penetration in p-MOSFET with shallow BF₂-implanted source/drain extension

Chang, S. J., Chang, C. Y., Chao, T-S., Zhong, S. Z., Yeh, W. K. & Huang, T. Y., 1 8月 2000, 於: IEEE Electron Device Letters. 21, 8, p. 381-383 3 p.

研究成果: Article › 同行評審

3 引文斯高帕斯（Scopus）

Novel Sub-10-nm Gate-all-around Si nanowire channel Poly-Si TFTs with raised source/drain

Lu, Y. H., Kuo, P. Y., Wu, Y. H., Chen, Y. H. & Chao, T-S., 1 2月 2011, 於: IEEE Electron Device Letters. 32, 2, p. 173-175 3 p., 5671463.

研究成果: Article › 同行評審

21 引文斯高帕斯（Scopus）

Novel symmetric vertical-channel ni-salicided poly-si thin-film transistors with high on/off-current ratio

Wu, Y. H., Kuo, P. Y., Lu, Y. H., Chen, Y. H. & Chao, T-S., 1 11月 2010, 於: IEEE Electron Device Letters. 31, 11, p. 1233-1235 3 p., 5559329.

研究成果: Article › 同行評審

4 引文斯高帕斯（Scopus）

Numerical simulation of quantum effects in high-k gate dielectric MOS structures using quantum mechanical models

Li, Y-M., Lee, J. W., Tang, T. W., Chao, T. S., Lei, T. F. & Sze, S. M., 1 8月 2002, 於: Computer Physics Communications. 147, 1-2, p. 214-217 4 p.

研究成果: Article › 同行評審

19 引文斯高帕斯（Scopus）

One-Step Cleaning Solution to Replace the Conventional RCA Two-Step Cleaning Recipe for Pregate Oxide Cleaning

Pan, T. M., Lei, T. F., Chao, T-S., Liaw, M. C., Ko, F-H. & Lu, C. P., 1 6月 2001, 於: Journal of the Electrochemical Society. 148, 6

研究成果: Article › 同行評審

28 引文斯高帕斯（Scopus）

Optimized ONO thickness for multi-level and 2-bit/cell operation for wrapped-select-gate (WSG) SONOS memory

Wu, W. C., Chao, T-S., Peng, W. C., Yang, W. L., Chen, J. H., Ma, M. W., Lai, C. S., Yang, T. Y., Lee, C. H., Hsieh, T. M., Liou, J. C., Chen, T. P., Chen, C. H., Lin, C. H., Chen, H. H. & Ko, J., 1 1月 2008, 於: Semiconductor Science and Technology. 23, 1, 015004.

研究成果: Article › 同行評審

4 引文斯高帕斯（Scopus）

Optimum conditions for novel one-step cleaning method for pre-gate oxide cleaning using robust design methodology

Pan, T. M., Lei, T. F., Chao, T-S., Liaw, M. C. & Lu, C. P., 10月 2000, 於: Japanese Journal of Applied Physics, Part 1: Regular Papers and Short Notes and Review Papers. 39, 10, p. 5805-5808 4 p.

研究成果: Article › 同行評審

2 引文斯高帕斯（Scopus）

Oxide thinning and structure scaling down effect of low-temperature poly-si thin-film transistors

Ma, W. C. Y., Chiang, T. Y., Lin, J. W. & Chao, T-S., 1 1月 2012, 於: IEEE/OSA Journal of Display Technology. 8, 1, p. 12-17 6 p., 6030887.

研究成果: Article › 同行評審

8 引文斯高帕斯（Scopus）

Particle contaminations in LPCVD polysilicon

Chen, W. H., Chao, T-S., Liu, Y. N., Lei, T. F. & Chou, K. S., 2 2月 1995, 於: Electronics Letters. 31, 3, p. 239-241 3 p.

研究成果: Article › 同行評審

Performance and interface characterization for contact etch stop layer-strained nMOSFET with HfO2 gate dielectrics under pulsed-IV measurement

Wu, W. C., Chao, T-S., Chiu, T. H., Wang, J. C., Lai, C. S., Ma, M. W. & Lo, W. C., 23 6月 2008, 於: Electrochemical and Solid-State Letters. 11, 8

研究成果: Article › 同行評審

3 引文斯高帕斯（Scopus）

Performance enhancement by local strain in (110) channel n-channel metal-oxide-semiconductor field-effect transistors on (111) substrate

Lo, W. C., Kuo, Y. H., Lee, Y. J., Chao, T-S. & Chang, C. Y., 7 9月 2007, 於: Japanese Journal of Applied Physics, Part 1: Regular Papers and Short Notes and Review Papers. 46, 9 A, p. 5715-5718 4 p.

研究成果: Article › 同行評審

Performance evaluation of cleaning solutions enhanced with tetraalkylammonium hydroxide substituents for post-CMP cleaning on poly-Si film

Pan, T. M., Lei, T. F., Ko, F-H., Chao, T-S., Liaw, M. C., Lee, Y. H. & Lud, C. P., 1 6月 2002, 於: Journal of the Electrochemical Society. 149, 6

研究成果: Article › 同行評審

12 引文斯高帕斯（Scopus）

Performance improvement of CoTiO3 high-k dielectrics with nitrogen incorporation

Chen, J. H., Huang, T. B., Wu, X., Landheer, D., Lei, T. F. & Chao, T-S., 1 1月 2007, 於: Journal of the Electrochemical Society. 154, 1

研究成果: Article › 同行評審

5 引文斯高帕斯（Scopus）

Performance improvement of nickel salicided n-type metal oxide semiconductor field effect transistors by nitrogen implantation

Chao, T-S. & Lee, L. Y., 1 4月 2002, 於: Japanese Journal of Applied Physics, Part 2: Letters. 41, 4 A, p. L381-L383

研究成果: Article › 同行評審

4 引文斯高帕斯（Scopus）

Physical and electrical characterization of ZrO₂ gate insulators deposited on Si(100) using Zr(Oⁱ-Pr)₂(thd)₂ and O₂

Chen, H. W., Huang, T. Y., Landheer, D., Wu, X., Moisa, S., Sproule, G. I. & Chao, T-S., 1 6月 2002, 於: Journal of the Electrochemical Society. 149, 6

研究成果: Article › 同行評審

21 引文斯高帕斯（Scopus）

Physical mechanism of high-programming-efficiency dynamic-threshold source-side injection in wrapped-select-gate SONOS for nor-type flash memory

Wang, K. T., Chao, T-S., Chiang, T. Y., Wu, W. C., Kuo, P. Y., Wu, Y. H., Lu, Y. L., Liao, C. C., Yang, W. L., Lee, C. H., Hsieh, T. M., Liou, J. C., Wang, S. D., Chen, T. P., Chen, C. H., Lin, C. H. & Chen, H. H., 6 11月 2009, 於: IEEE Electron Device Letters. 30, 11, p. 1206-1208 3 p.

研究成果: Article › 同行評審

3 引文斯高帕斯（Scopus）

Plasma-induced charging damage in ultrathin (3-nm) gate oxides

Chen, C. C., Lin, H-C., Chang, C. Y., Liang, M. S., Chien, C-H., Hsien, S. K., Huang, T. Y. & Chao, T-S., 1 7月 2000, 於: IEEE Transactions on Electron Devices. 47, 7, p. 1355-1360 6 p.

研究成果: Article › 同行評審

18 引文斯高帕斯（Scopus）

趙 天生

研究成果

搜尋結果

趙天生