每年研究成果
每年研究成果
- 7結果
搜尋結果
-
2004
A parameterized power-aware IP core generator for the 2-D 8×8 DCT/IDCT
Ju, R. C., Chen, J. W., Guo, J.-I. & Chen, T.-F., 2004, 於: Proceedings - IEEE International Symposium on Circuits and Systems. 2, p. II769-II772研究成果: Conference article › 同行評審
3 引文 斯高帕斯（Scopus） -
A power-aware IP core design for the variable-length DCT/IDCT targeting at MPEG4 shape-adaptive transforms
Chen, K. H., Guo, J.-I., Wang, J. S., Yeh, C. W. & Chen, T.-F., 2004, 於: Proceedings - IEEE International Symposium on Circuits and Systems. 2, p. II41-II44研究成果: Conference article › 同行評審
8 引文 斯高帕斯（Scopus） -
A power-aware IP core generator for the one-dimensional discrete fourier transform
Chien, C. D., Lin, C. C., Guo, J.-I. & Chen, T.-F., 2004, 於: Proceedings - IEEE International Symposium on Circuits and Systems. 3, p. III637-III640研究成果: Conference article › 同行評審
1 引文 斯高帕斯（Scopus） -
Unified bus encoding by stream reconstruction with variable strides
Chen, T.-F., Hsieh, T. M. & Wei, C. L., 2004, 於: Proceedings - IEEE International Symposium on Circuits and Systems. 2, p. II329-II332研究成果: Conference article › 同行評審
-
1996
Efficient trace-sampling simulation techniques for cache performance analysis
Chen, T.-F., 1996, 於: Proceedings of the IEEE Annual Simulation Symposium. p. 54-63 10 p.研究成果: Conference article › 同行評審
3 引文 斯高帕斯（Scopus） -
1995
Effective programmable prefetch engine for on-chip caches
Chen, T.-F., 1995, 於: Proceedings of the Annual International Symposium on Microarchitecture. p. 237-242 6 p.研究成果: Conference article › 同行評審
25 引文 斯高帕斯（Scopus） -
1994
Performance study of software and hardware data prefetching schemes
Chen, T.-F. & Baer, J. L., 1994, 於: Conference Proceedings - Annual International Symposium on Computer Architecture, ISCA. p. 223-232 10 p.研究成果: Conference article › 同行評審
112 引文 斯高帕斯（Scopus）