Shyh-Jye Jerry Jou

每年研究成果

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篩選

1994
Benchmark circuits for mixed-mode simulators
Saleh, R., Jou, S-J., Overhauser, D., Xu, X. & Wang, Y., 1 1月 1994, Proceedings of the Custom Integrated Circuits Conference. Anon (編輯). Publ by IEEE, p. 441-448 8 p. (Proceedings of the Custom Integrated Circuits Conference).
研究成果: Conference contribution › 同行評審
1 引文斯高帕斯（Scopus）
1992
An efficient determinant approach to symbolic function generation for analog circuits
Jou, S-J. & Hung, C. C., 1 1月 1992, 1992 Proceedings of the 35th Midwest Symposium on Circuits and Systems. Institute of Electrical and Electronics Engineers Inc., p. 827-830 4 p. 271196. (Midwest Symposium on Circuits and Systems; 卷 1992-August).
研究成果: Conference contribution › 同行評審
1991
An event-driven incremental timing fault simulator
Jou, S-J., Shen, W. Z. & Chiou, S. H., 1 1月 1991, 1991 International Symposium on VLSI Technology, Systems, and Applications - Proceedings of Technical Papers, VTSA 1991. Institute of Electrical and Electronics Engineers Inc., p. 424-427 4 p. 246754. (International Symposium on VLSI Technology, Systems, and Applications, Proceedings).
研究成果: Conference contribution › 同行評審
1988
Design of a systolic array system for linear state equations.
Jou, S-J., Jen, C. W. & Shen, W. Z., 1 12月 1988, Proc Int Conf on Systolic Arrays. Publ by IEEE, p. 275-284 10 p. (Proc Int Conf on Systolic Arrays).
研究成果: Conference contribution › 同行評審

周 世傑